March 1998
Revised April 1999
74VCX162827
Low Voltage 20-Bit Buffer/Line Driver with 3.6V Tolerant
Inputs and Outputs and 26Ω Series Resistors in the
Outputs
General Description
The VCX162827 contains twenty non-inverting buffers with
Features
■ 1.65V–3.6V VCC supply operation
3-STATE outputs to be employed as
a memory and
■ 3.6V tolerant inputs and outputs
■ 26Ω series resistors in outputs
■ tPD
address driver, clock driver, or bus oriented transmitter/
receiver. The device is byte controlled. Each byte has NOR
output enables for maximum control flexibility.
The 74VCX162827 is designed for low voltage (1.65V to
3.6V) VCC applications with I/O capability up to 3.6V. The
3.4 ns max for 3.0V to 3.6V VCC
4.1 ns max for 2.3V to 2.7V VCC
8.2 ns max for 1.65V to 1.95V VCC
VCX162827 is also designed with 26Ω resistors in the out-
puts.
■ Power-off high impedance inputs and outputs
■ Supports live insertion and withdrawal (Note 1)
The 74VCX162827 is fabricated with an advanced CMOS
technology to achieve high speed operation while maintain-
ing low CMOS power dissipation.
■ Static Drive (IOH/IOL
)
±12 mA @ 3.0V VCC
±8 mA @ 2.3V VCC
±3 mA @ 1.65V VCC
■ Uses patented noise/EMI reduction circuitry
■ Latch-up performance exceeds 300 mA
■ ESD performance:
Human body model > 2000V
Machine model > 200V
Note 1: To ensure the high-impedance state during power up or power
down, OE should be tied to V
through a pull-up resistor; the minimum
CC
value of the resistor is determined by the current-sourcing capability of the
driver.
Ordering Code:
Order Number
Package Number
Package Description
74VCX162827MTD
MTD56
56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
Devices also available in Tape and Reel. Specify by appending the suffix “X” to the ordering code.
Logic Symbol
Pin Descriptions
Pin Names
OEn
Description
Output Enable Input (Active LOW)
Inputs
I0–I19
O0–O19
Outputs
© 1999 Fairchild Semiconductor Corporation
DS500138.prf
www.fairchildsemi.com