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74V2T32

更新时间： 2024-09-12 21:55:27

品牌	Logo	应用领域
意法半导体 - STMICROELECTRONICS		输入元件
页数	文件大小	规格书
7页	84K
描述
DUAL 2-INPUT OR GATE

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中文翻译

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数据手册

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74V2T32 数据手册

74V2T32

DUAL 2-INPUT OR GATE

■

HIGH SPEED: t = 4.6ns (TYP.) at V = 5V

PD CC

LOW POWER DISSIPATION:

= 1µA(MAX.) at T = 25°C

■

COMPATIBLE WITH TTL OUTPUTS:

= 2V (MIN), V = 0.8V (MAX)

POWER DOWN PROTECTION ON INPUTS

SYMMETRICAL OUTPUT IMPEDANCE:

SOT23-8L

|I | = I = 8mA (MIN)

■

BALANCED PROPAGATION DELAYS:

ORDER CODES

PLH

PHL

PACKAGE

SOT23-8L

T & R

OPERATING VOLTAGE RANGE:

(OPR) = 4.5V to 5.5V

74V2T32STR

IMPROVED LATCH-UP IMMUNITY

Power down protection is provided on all inputs

and outputs and 0 to 7V can be accepted on

inputs with no regard to the supply voltage.

DESCRIPTION

The 74V2T32 is an advanced high-speed CMOS

DUAL 2-INPUT OR GATE fabricated with

sub-micron silicon gate and double-layer metal

This device can be used to interface 5V to 3V

systems and it is ideal for portable applications

personal

digital

assistant

and

all

wiring C MOS technology.

battery-powered equipment.

The internal circuit is composed of 3 stages

including buffer output, which provide high noise

immunity and stable output.

All inputs and outputs are equipped with

protection circuits against static discharge, giving

them ESD immunity and transient excess voltage.

PIN CONNECTION AND IEC LOGIC SYMBOLS

March 2004

1/7

12 3 4 5 6 7

中文翻译

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