74V2T241

更新时间： 2024-01-12 06:10:33

品牌	Logo	应用领域
意法半导体 - STMICROELECTRONICS		/
页数	文件大小	规格书
8页	155K
描述
DUAL BUS BUFFER NON INVERTED (3-STATE)

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中文翻译

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数据手册

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74V2T241 数据手册

74V2T241

DUAL BUS BUFFER NON INVERTED (3-STATE)

■

HIGH SPEED: t = 3.8ns (TYP.) at V = 5V

PD CC

LOW POWER DISSIPATION:

= 1µA(MAX.) at T = 25°C

■

POWER DOWN PROTECTION ON INPUTS

AND OUTPUTS

COMPATIBLE WITH TTL LEVEL:

SOT23-8L

V =2.0V(MIN), V =0.8V(MAX)

■ SYMMETRICAL OUTPUT IMPEDANCE:

|I | = I = 8mA (MIN) at V = 4.5V

■

BALANCED PROPAGATION DELAYS:

ORDER CODES

PACKAGE

PLH

PHL

T & R

OPERATING VOLTAGE RANGE:

(OPR) = 4.5V to 5.5V

SOT23-8L

74V2T241STR

IMPROVED LATCH-UP IMMUNITY

inputs and outputs and 0 to 7V can be accepted

on inputs with no regard to the supply voltage.

This device can be used to interface 5V to 3V

systems and it is ideal for portable applications

like personal digital assistant, camcorder and all

battery-powered equipment.

All inputs and outputs are equipped with

protection circuits against static discharge, giving

them ESD immunity and transient excess voltage.

DESCRIPTION

The 74V2T241 is an advanced high-speed CMOS

DUAL BUS BUFFER NON INVERTER fabricated

with sub-micron silicon gate and double-layer

metal wiring C MOS technology.

It has one active-high and one active-low output

enable. Power down protection is provided on all

PIN CONNECTION AND IEC LOGIC SYMBOLS

June 2003

1/8

12 3 4 5 6 7 8

中文翻译

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