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74V2G241 PDF预览

74V2G241

更新时间: 2024-11-04 08:04:43
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS /
页数 文件大小 规格书
9页 102K
描述
DUAL BUS BUFFER NON INVERTED (3-STATE)

74V2G241 数据手册

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74V2G241  
DUAL BUS BUFFER NON INVERTED (3-STATE)  
HIGH SPEED: t = 3.8ns (TYP.) at V = 5V  
PD CC  
LOW POWER DISSIPATION:  
I
= 1µA(MAX.) at T = 25°C  
CC  
A
HIGH NOISE IMMUNITY:  
= V = 28% V (MIN.)  
POWER DOWN PROTECTION ON INPUTS  
AND OUTPUTS  
V
NIH  
NIL  
CC  
SOT23-8L  
SYMMETRICAL OUTPUT IMPEDANCE:  
|I | = I = 8mA (MIN) at V = 4.5V  
OH  
OL  
CC  
BALANCED PROPAGATION DELAYS:  
ORDER CODES  
PACKAGE  
t
t
PLH  
PHL  
T & R  
OPERATING VOLTAGE RANGE:  
(OPR) = 2V to 5.5V  
SOT23-8L  
74V2G241STR  
V
CC  
IMPROVED LATCH-UP IMMUNITY  
inputs with no regard to the supply voltage. This  
device can be used to interface 5V to 3V systems  
and it is ideal for portable applications like  
personal digital assistant, camcorder and all  
battery-powered equipment.  
All inputs and outputs are equipped with  
protection circuits against static discharge, giving  
them ESD immunity and transient excess voltage.  
DESCRIPTION  
The 74V2G241 is an advanced high-speed CMOS  
DUAL BUS BUFFER NON INVERTER fabricated  
with sub-micron silicon gate and double-layer  
metal wiring C MOS technology.  
Power down protection is provided on all inputs  
and outputs and 0 to 7V can be accepted on  
2
PIN CONNECTION AND IEC LOGIC SYMBOLS  
June 2003  
1/9  

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