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74V2G03 PDF预览

74V2G03

更新时间: 2024-11-04 03:21:59
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS 输入元件
页数 文件大小 规格书
7页 132K
描述
DUAL 2-INPUT OPEN DRAIN NAND GATE

74V2G03 数据手册

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74V2G03  
DUAL 2-INPUT OPEN DRAIN NAND GATE  
HIGH SPEED: t = 3.9ns (TYP.) at V = 5V  
PD CC  
LOW POWER DISSIPATION:  
I
= 1µA(MAX.) at T = 25°C  
CC  
A
HIGH NOISE IMMUNITY:  
= V = 28% V (MIN.)  
V
NIH  
NIL  
CC  
POWER DOWN PROTECTION ON INPUTS  
OPERATING VOLTAGE RANGE:  
SOT23-8L  
V
(OPR) = 2V to 5.5V  
CC  
IMPROVED LATCH-UP IMMUNITY  
ORDER CODES  
PACKAGE  
DESCRIPTION  
T & R  
The 74V2G03 is an advanced high-speed CMOS  
DUAL 2-INPUT OPEN DRAIN NAND GATE  
fabricated with sub-micron silicon gate and  
SOT23-8L  
74V2G03STR  
can also be used as a led driver in any other  
application requiring current sink.  
Power down protection is provided on all inputs  
and 0 to 7V can be accepted on inputs with no  
regard to the supply voltage. This device can be  
used to interface 5V to 3V.  
2
double-layer metal wiring C MOS technology.  
The internal circuit is composed of 3 stages  
including buffer output, which provide high noise  
immunity and stable output.  
The device can, with an external pull-up resistor,  
be used in wired AND configuration. This device  
PIN CONNECTION AND IEC LOGIC SYMBOLS  
June 2003  
1/7  

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