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74V2G02 PDF预览

74V2G02

更新时间: 2024-01-09 23:21:07
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS 输入元件
页数 文件大小 规格书
7页 83K
描述
DUAL 2-INPUT NOR GATE

74V2G02 技术参数

是否Rohs认证: 符合生命周期:Obsolete
零件包装代码:SOT-23包装说明:LSSOP, TSSOP8,.1
针数:8Reach Compliance Code:compliant
HTS代码:8542.39.00.01风险等级:5.84
Is Samacsys:N系列:AHC/VHC/H/U/V
JESD-30 代码:R-PDSO-G8JESD-609代码:e0
长度:2.9 mm逻辑集成电路类型:NOR GATE
最大I(ol):0.004 A湿度敏感等级:1
功能数量:2输入次数:2
端子数量:8最高工作温度:125 °C
最低工作温度:-55 °C封装主体材料:PLASTIC/EPOXY
封装代码:LSSOP封装等效代码:TSSOP8,.1
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, LOW PROFILE, SHRINK PITCH
包装方法:TAPE AND REEL峰值回流温度(摄氏度):260
电源:2/5.5 VProp。Delay @ Nom-Sup:11.5 ns
传播延迟(tpd):11.5 ns认证状态:Not Qualified
施密特触发器:NO座面最大高度:1.45 mm
子类别:Gates最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):2 V标称供电电压 (Vsup):3.3 V
表面贴装:YES技术:CMOS
温度等级:MILITARY端子形式:GULL WING
端子节距:0.65 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:1.625 mm
Base Number Matches:1

74V2G02 数据手册

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74V2G02  
DUAL 2-INPUT NOR GATE  
HIGH SPEED: t = 3.6ns (TYP.) at V = 5V  
PD CC  
LOW POWER DISSIPATION:  
I
= 1µA (MAX.) at T = 25°C  
CC  
A
HIGH NOISE IMMUNITY:  
= V = 28% V (MIN.)  
V
NIH  
NIL  
CC  
POWER DOWN PROTECTION ON INPUTS  
SOT23-8L  
SYMMETRICAL OUTPUT IMPEDANCE:  
|I | = I = 8mA (MIN) at V = 4.5V  
OH  
OL  
CC  
BALANCED PROPAGATION DELAYS:  
ORDER CODES  
t
t
PLH  
PHL  
PACKAGE  
SOT23-8L  
T & R  
OPERATING VOLTAGE RANGE:  
(OPR) = 2V to 5.5V  
74V2G02STR  
V
CC  
IMPROVED LATCH-UP IMMUNITY  
The internal circuit is composed of 3 stages  
including buffer output, which provide high noise  
immunity and stable output.  
DESCRIPTION  
The 74V2G02 is an advanced high-speed CMOS  
DUAL 2-INPUT NOR GATE fabricated with  
sub-micron silicon gate and double-layer metal  
Power down protection is provided on all inputs  
and 0 to 7V can be accepted on inputs with no  
regard to the supply voltage. This device can be  
used to interface 5V to 3V.  
2
wiring C MOS technology.  
PIN CONNECTION AND IEC LOGIC SYMBOLS  
June 2003  
1/7  

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