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74V1G32 PDF预览

74V1G32

更新时间: 2024-11-05 22:45:59
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS 输入元件
页数 文件大小 规格书
7页 51K
描述
SINGLE 2-INPUT OR GATE

74V1G32 数据手册

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74V1G32  
SINGLE 2-INPUT OR GATE  
HIGH SPEED:tPD =3.8ns (TYP.) atVCC = 5V  
LOW POWER DISSIPATION:  
ICC =2 µA (MAX.) at TA =25 oC  
HIGH NOISEIMMUNITY:  
VNIH = VNIL =28% VCC (MIN.)  
S
C
POWERDOWN PROTECTIONON INPUTS  
SYMMETRICAL OUTPUT IMPEDANCE:  
|IOH| = IOL = 8 mA (MIN)  
BALANCEDPROPAGATIONDELAYS:  
tPLH tPHL  
(SOT23-5L)  
(SC-70)  
ORDER CODE:  
74V1G32S  
74V1G32C  
The internal circuit is composed of 2 stages  
including buffer output, which provide high noise  
immunity and stable output.  
OPERATING VOLTAGERANGE:  
VCC (OPR)= 2V to 5.5V  
IMPROVED LATCH-UP IMMUNITY  
Power down protection is provided on all inputs  
and 0 to 7V can be accepted on inputs with no  
regard to the supply voltage. This device can be  
used to interface5V to 3V.  
DESCRIPTION  
The 74V1G32 is an advanced high-speed CMOS  
SINGLE 2-INPUT OR GATE fabricated with  
sub-micron silicon gate and double-layer metal  
wiring C2MOS technology.  
PIN CONNECTION AND IEC LOGIC SYMBOLS  
1/7  
October 1999  

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