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74V1G14 PDF预览

74V1G14

更新时间: 2024-11-05 22:22:07
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意法半导体 - STMICROELECTRONICS /
页数 文件大小 规格书
7页 52K
描述
SINGLE SCHMITT INVERTER

74V1G14 数据手册

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74V1G14  
SINGLE SCHMITT INVERTER  
HIGH SPEED:tPD =5.5ns (TYP.) atVCC = 5V  
LOW POWER DISSIPATION:  
ICC =1 µA (MAX.) at TA =25 oC  
TYPICAL HYSTERESIS:Vh = 1V AT VCC=4.5V  
POWERDOWN PROTECTIONON INPUTS  
SYMMETRICAL OUTPUT IMPEDANCE:  
|IOH| = IOL = 8 mA (MIN)  
BALANCEDPROPAGATIONDELAYS:  
tPLH tPHL  
S
C
(SOT23-5L)  
(SC-70)  
ORDER CODE:  
74V1G14S  
74V1G14C  
OPERATING VOLTAGERANGE:  
regard to the supply voltage. This device can be  
used to interface5V to 3V.  
VCC (OPR)= 2V to 5.5V  
IMPROVED LATCH-UP IMMUNITY  
Pin configuration and function are the same as  
those of the V1G04 but the V1G14 has  
hysteresis.  
This together with its schmitt trigger function  
allows it to be used on line receivers with slow  
rise/fall input signals.  
DESCRIPTION  
The 74V1G14 is an advanced high-speed CMOS  
SINGLE SCHMITT INVERTER fabricated with  
sub-micron silicon gate and double-layer metal  
wiring C2MOS technology.  
The internal circuit is composed of 3 stages  
including buffer output, which provide high noise  
immunity and stable output.  
Power down protection is provided on all inputs  
and 0 to 7V can be accepted on inputs with no  
All inputs and outputs are equipped with  
protection circuits against static discharge, giving  
them 2KV ESD immunity and transient excess  
voltage.  
PIN CONNECTION AND IEC LOGIC SYMBOLS  
1/7  
October 1999  

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