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74V1G07

更新时间： 2024-11-05 22:16:47

品牌	Logo	应用领域
意法半导体 - STMICROELECTRONICS		/
页数	文件大小	规格书
7页	51K
描述
SINGLE BUFFER OPEN DRAIN

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中文翻译

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数据手册

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74V1G07 数据手册

74V1G07

SINGLE BUFFER (OPEN DRAIN)

PRELIMINARY DATA

■

HIGH SPEED:t_PD=6.1ns (TYP.) atV_CC= 5V

LOW POWER DISSIPATION:

_CC=1 µA (MAX.) at T_A=25 ^oC

HIGH NOISEIMMUNITY:

_NIH= V_NIL=28% V_CC(MIN.)

■

POWERDOWN PROTECTIONON INPUT

OPERATING VOLTAGERANGE:

(SOT23-5L)

(SC-70)

ORDER CODE:

V_CC(OPR)= 2V to 5.5V

74V1G07S

74V1G07C

■

IMPROVED LATCH-UP IMMUNITY

Power down protection is provided on input and 0

to 7V can be accepted on input with no regard to

the supply voltage. This device can be used to

interface5V to 3V.

DESCRIPTION

The 74V1G07 is an advanced high-speed CMOS

SINGLE BUFFER (OPEN DRAIN) fabricated with

sub-micron silicon gate and double-layer metal

wiring C²MOS technology.

The internal circuit is composed of 2 stages

including buffer output, which provide high noise

immunity and stable output.

PIN CONNECTION AND IEC LOGIC SYMBOLS

1/7

October 1999

12 3 4 5 6 7

中文翻译

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