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74OL6000_05 PDF预览

74OL6000_05

更新时间: 2024-02-25 00:17:07
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 光电局域网
页数 文件大小 规格书
15页 608K
描述
OPTOPLANAR HIGH-SPEED LOGIC-TO-LOGIC OPTOCOUPLERS

74OL6000_05 数据手册

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®
OPTOPLANAR HIGH-SPEED  
LOGIC-TO-LOGIC OPTOCOUPLERS  
TTL BUFFER  
74OL6000  
74OL6001  
74OL6010  
74OL6011  
TTL INVERTER  
CMOS BUFFER  
CMOS INVERTER  
LSTTL TO  
PACKAGE  
SYMBOL  
BUFFER  
6
6
6
1
1
INVERTER  
1
DESCRIPTION  
OPTOLOGIC™ is the first family of truly logic compatible optically coupled logic interface gates.  
The family consists of four device types offering LSTTL to TTL and LSTTL to CMOS interfacing. Each of these interfacing functions  
is available as a buffer (A=B), or as an inverter (A=B).  
The LSTTL input compatibility is provided by an input integrated circuit, with industry standard logic levels. This input amplifier IC  
switches a temperature compensated current source driving a high speed 850 nm AlGaAs LED emitter. This novel integration  
scheme eliminates CTR degradation over time and temperature.  
The emitter is optically coupled to an integrated photodetector/high-gain, high-speed output amplifier IC. The superior 15kV/µS  
common-mode noise rejection is ensured through the use of an optically transparent noise shield.  
The TTL compatible output has a totem-pole with a fan-out of 10. The CMOS compatible output has an open collector Schottky-  
clamped transistor that interfaces to any CMOS logic between 4.5 and 15 volts.The 74OL6010/11 may also by used to drive power  
MOSFETS or transistors up to 15 volts.  
The Optologic coupler family typically offers propagation of delays of 60 ns and can support 15 MBaud data communication.  
The two input chips and the output chip are assembled in a 6-pin DIP high insulation voltage plastic package. Fairchild’s proprietary  
®
OPTOPLANAR construction provides a withstand test voltage of 5300 VRMS (1 minute).  
FEATURES  
APPLICATIONS  
Industry first LSTTL to TTL and LSTTL to CMOS complete  
logic-to-logic optocoupler  
Incorporates LED drive circuitry — use as logic gate  
Very high speed  
Transmission line interface — receiver and driver  
Excellent as bridged receiver in fast LAN highways  
Bus interface  
Logic family interface with ground loop noise elimination  
High speed AC/DC voltage sensing  
Driver for power semiconductor devices  
Level shifting  
Choice of buffer or inverter  
Choice of TTL or CMOS compatible output up to 15 volts  
Fan-out of 10 TTL loads, fan-in 1 LSTTL load  
Internal noise shield — very high CMR of 15 kV/µS  
UL recognized (File #E90700)  
Replaces fast pulse transformers  
Same noise immunity as LSTTL/TTL.  
© 2005 Fairchild Semiconductor Corporation  
Page 1 of 15  
9/6/05  

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