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74LX1G86 PDF预览

74LX1G86

更新时间: 2024-11-10 21:55:27
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS /
页数 文件大小 规格书
10页 120K
描述
SINGLE EXCLUSIVE OR GATE

74LX1G86 数据手册

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74LX1G86  
SINGLE EXCLUSIVE OR GATE  
5V TOLERANT INPUTS  
HIGH SPEED: t = 5ns (MAX.) at V = 3V  
PD  
CC  
LOW POWER DISSIPATION:  
I
= 1µA (MAX.) at T = 25°C  
CC  
A
POWER DOWN PROTECTION ON INPUTS  
AND OUTPUTS  
SOT23-5L  
SOT323-5L  
T & R  
SYMMETRICAL OUTPUT IMPEDANCE:  
|I | = I = 24mA (MIN) at V = 3V  
OH  
OL  
CC  
BALANCED PROPAGATION DELAYS:  
ORDER CODES  
t
t
PLH  
PHL  
PACKAGE  
OPERATING VOLTAGE RANGE:  
(OPR) = 1.65V to 5.5V  
SOT23-5L  
74LX1G86STR  
74LX1G86CTR  
V
CC  
(1.2V Data Retention)  
SOT323-5L  
IMPROVED LATCH-UP IMMUNITY  
Power down protection is provided on all inputs  
and 0 to 7V can be accepted on inputs with no  
regard to the supply voltage. This device can be  
used to interface 5V to 3V.  
DESCRIPTION  
The 74LX1G86 is a low voltage CMOS SINGLE  
EXCLUSIVE  
OR  
GATE  
fabricated  
with  
sub-micron silicon gate and double-layer metal  
wiring C MOS technology.  
All inputs and outputs are equipped with  
protection circuits against static discharge.  
2
PIN CONNECTION AND IEC LOGIC SYMBOLS  
April 2004  
1/10  

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