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74LX1G08STR PDF预览

74LX1G08STR

更新时间: 2024-11-10 21:57:55
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS 输入元件
页数 文件大小 规格书
10页 203K
描述
LOW VOLTAGE CMOS SINGLE 2-INPUT AND GATE WITH 5V TOLERANT INPUT

74LX1G08STR 数据手册

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74LX1G08  
LOW VOLTAGE CMOS SINGLE 2-INPUT AND GATE  
WITH 5V TOLERANT INPUT  
5V TOLERANT INPUTS  
HIGH SPEED: t = 4.5ns (MAX.) at V = 3V  
PD  
CC  
LOW POWER DISSIPATION:  
I
= 1µA (MAX.) at T = 25°C  
CC  
A
POWER DOWN PROTECTION ON INPUTS  
AND OUTPUTS  
SOT23-5  
SC70-5  
SYMMETRICAL OUTPUT IMPEDANCE:  
|I | = I = 24mA (MIN) at V = 3V  
OH  
OL  
CC  
BALANCED PROPAGATION DELAYS:  
ORDER CODES  
t
t
PLH  
PHL  
PACKAGE  
T & R  
OPERATING VOLTAGE RANGE:  
(OPR) = 1.65V to 5.5V  
V
SOT23-5L  
74LX1G08STR  
74LX1G08CTR  
CC  
(1.2V Data Retention)  
SOT323-5L  
IMPROVED LATCH-UP IMMUNITY  
output, which provide high noise immunity and  
stable output.  
DESCRIPTION  
The 74LX1G08 is a low voltage CMOS SINGLE  
2-INPUT AND GATE fabricated with sub-micron  
silicon gate and double-layer metal wiring C MOS  
tecnology.  
It is ideal for 1.65 to 5.5 V  
Power down protection is provided on input and  
output and 0 to 7V can be accepted on inputs with  
no regard to the supply voltage. It can be  
interfaced to 5V signal environment for inputs in  
mixed 3.3/5V system.  
2
operations and low  
CC  
power and low noise applications. The internal  
circuit is composed of 3 stages including buffer  
All inputs and outputs are equipped with  
protection circuits against static discharge.  
PIN CONNECTION AND IEC LOGIC SYMBOLS  
October 2002  
1/10  

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