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74LVXC3245 PDF预览

74LVXC3245

更新时间: 2024-11-15 03:53:35
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS 总线收发器
页数 文件大小 规格书
14页 349K
描述
OCTAL DUAL SUPPLY BUS TRANSCEIVER

74LVXC3245 数据手册

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74LVXC3245  
OCTAL DUAL SUPPLY BUS TRANSCEIVER  
HIGH SPEED:  
t
= 8ns (MAX.) at T =25°C  
PD  
A
V
= 3.3V, V  
= 5.0V  
CCA  
CCB  
LOW POWER DISSIPATION:  
= I = 5µA(MAX.) at T =25°C  
I
CCA  
CCB  
A
LOW NOISE: V  
=0.3V (TYP.) at  
OLP  
V
=3.3V  
SOP  
TSSOP  
T & R  
CCA  
SYMMETRICAL OUTPUT IMPEDANCE:  
|I | = I = 24mA (MIN)  
OH  
OL  
Table 1: Order Codes  
PACKAGE  
BALANCED PROPAGATION DELAYS:  
t
t
PLH  
PHL  
OPERATING VOLTAGE RANGE:  
SOP  
74LVXC3245MTR  
74LVXC3245TTR  
V
(OPR)=2.7Vto3.6V(1.2VDataRetention)  
CCA  
TSSOP  
V
(OPR)=2.7Vto5.5V(1.2VDataRetention)  
CCB  
PIN AND FUNCTION COMPATIBLE WITH  
74 SERIES C3245  
IMPROVED LATCH-UP IMMUNITY  
This IC is intended for two-way asynchronous  
communication between data buses and the  
direction of data transmission is determined by  
DIR input. The enable input G can be used to  
disable the device so that the buses are effectively  
isolated.  
DESCRIPTION  
The 74LVXC3245 is  
a dual supply 8 bit  
configurable low voltage CMOS OCTAL BUS  
TRANSCEIVER fabricated with sub-micron silicon  
The A-port interfaces with the 3V bus, the B-port  
with the 5V bus.  
2
gate and double-layer metal wiring C MOS  
technology. Designed for use as an interface  
between a 3.3V bus and a 3.3V to 5V bus in a  
mixed 3.3V/5V supply systems, it achieves high  
speed operation while maintaining the CMOS low  
power dissipation.  
All inputs are equipped with protection circuits  
against static discharge, giving them 2KV ESD  
immunity and transient excess voltage.  
Figure 1: Pin Connection And IEC Logic Symbols  
Rev. 4  
1/14  
August 2004  

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