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74LVX574MTR PDF预览

74LVX574MTR

更新时间: 2024-11-14 04:47:59
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS 总线驱动器总线收发器触发器逻辑集成电路光电二极管输入元件
页数 文件大小 规格书
13页 304K
描述
LOW VOLTAGE CMOS OCTAL D-TYPE FLIP-FLOP (3-STATE NON INV.) WITH 5V TOLERANT INPUTS

74LVX574MTR 技术参数

是否Rohs认证: 符合生命周期:Obsolete
零件包装代码:SOIC包装说明:SOP, SOP20,.4
针数:20Reach Compliance Code:compliant
HTS代码:8542.39.00.01风险等级:5.19
系列:LV/LV-A/LVX/HJESD-30 代码:R-PDSO-G20
JESD-609代码:e4长度:12.8 mm
负载电容(CL):50 pF逻辑集成电路类型:BUS DRIVER
最大频率@ Nom-Sup:40000000 Hz最大I(ol):0.004 A
位数:8功能数量:1
端口数量:2端子数量:20
最高工作温度:125 °C最低工作温度:-55 °C
输出特性:3-STATE输出极性:TRUE
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装等效代码:SOP20,.4封装形状:RECTANGULAR
封装形式:SMALL OUTLINE包装方法:TAPE AND REEL
峰值回流温度(摄氏度):NOT SPECIFIED电源:3.3 V
传播延迟(tpd):21 ns认证状态:Not Qualified
座面最大高度:2.65 mm子类别:FF/Latches
最大供电电压 (Vsup):3.6 V最小供电电压 (Vsup):2 V
标称供电电压 (Vsup):2.7 V表面贴装:YES
技术:CMOS温度等级:MILITARY
端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED触发器类型:POSITIVE EDGE
宽度:7.5 mmBase Number Matches:1

74LVX574MTR 数据手册

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74LVX574  
LOW VOLTAGE CMOS OCTAL D-TYPE FLIP-FLOP  
(3-STATE NON INV.) WITH 5V TOLERANT INPUTS  
HIGH SPEED:  
= 125MHz (TYP.) at V = 3.3V  
f
MAX  
CC  
5V TOLERANT INPUTS  
POWER-DOWN PROTECTION ON INPUTS  
INPUT VOLTAGE LEVEL:  
V
= 0.8V, V = 2V at V = 3V  
IL  
IH CC  
SOP  
TSSOP  
LOW POWER DISSIPATION:  
= 4 µA (MAX.) at T =25°C  
I
CC  
A
LOW NOISE:  
= 0.3V (TYP.) at V =3.3V  
Table 1: Order Codes  
PACKAGE  
V
OLP  
CC  
T & R  
SYMMETRICAL OUTPUT IMPEDANCE:  
|I | = I = 4 mA (MIN) at V =3V  
SOP  
74LVX574MTR  
74LVX574TTR  
OH  
OL  
CC  
BALANCED PROPAGATION DELAYS:  
TSSOP  
t
t
PLH  
PHL  
OPERATING VOLTAGE RANGE:  
(OPR) = 2V to 3.6V (1.2V Data Retention)  
D inputs. While the (OE) input is low, the 8 outputs  
will be in a normal logic state (high or low logic  
level) and while high level the outputs will be in a  
high impedance state. The output control does not  
affect the internal operation of flip flops; that is, the  
old data can be retained or the new data can be  
entered even while the outputs are off.  
V
CC  
PIN AND FUNCTION COMPATIBLE WITH  
74 SERIES 574  
IMPROVED LATCH-UP IMMUNITY  
DESCRIPTION  
The 74LVX574 is a low voltage CMOS OCTAL  
D-TYPE FLIP-FLOP with 3 STATE OUTPUT NON  
INVERTING fabricated with sub-micron silicon  
gate and double-layer metal wiring C MOS  
technology. It is ideal for low power, battery  
operated and low noise 3.3V applications.  
Power down protection is provided on all inputs  
and 0 to 7V can be accepted on inputs with no  
regard to the supply voltage.  
This device can be used to interface 5V to 3V. It  
combines high speed performance with the true  
CMOS low power consumption.  
2
This 8 bit D-Type flip-flop is controlled by a clock  
input (CK) and an output enable input (OE). On  
the positive transition of the clock, the Q outputs  
will be set to the logic state that were setup at the  
All inputs and outputs are equipped with  
protection circuits against static discharge, giving  
them 2KV ESD immunity and transient excess  
voltage.  
Figure 1: Pin Connection And IEC Logic Symbols  
Rev. 3  
1/13  
August 2004  

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