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74LVX4245 PDF预览

74LVX4245

更新时间: 2024-10-01 22:15:07
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD /
页数 文件大小 规格书
8页 88K
描述
8-Bit Dual Supply Translating Transceiver with 3-STATE Outputs

74LVX4245 数据手册

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January 1993  
Revised September 2003  
74LVX4245  
8-Bit Dual Supply Translating Transceiver  
with 3-STATE Outputs  
General Description  
Features  
Bidirectional interface between 5V and 3V buses  
The LVX4245 is a dual-supply, 8-bit translating transceiver  
that is designed to interface between a 5V bus and a 3V  
bus in a mixed 3V/5V supply environment. The Transmit/  
Receive (T/R) input determines the direction of data flow.  
Transmit (active-HIGH) enables data from A Ports to B  
Ports; Receive (active-LOW) enables data from B Ports to  
A Ports. The Output Enable input, when HIGH, disables  
both A and B Ports by placing them in a high impedance  
condition. The A Port interfaces with the 5V bus; the B Port  
interfaces with the 3V bus.  
Control inputs compatible with TTL level  
5V data flow at A Port and 3V data flow at B Port  
Outputs source/sink 24 mA at 5V bus; 12 mA at 3V bus  
Guaranteed simultaneous switching noise level and  
dynamic threshold performance  
Implements patented EMI reduction circuitry  
Functionally compatible with the 74 series 245  
The LVX4245 is suitable for mixed voltage applications  
such as laptop computers using 3.3V CPU’s and 5V LCD  
displays.  
Ordering Code:  
Order Number Package Number  
Package Description  
74LVX4245WM  
74LVX4245QSC  
74LVX4245MTC  
M24B  
MQA24  
MTC24  
24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide  
24-Lead Quarter Size Outline Package (QSOP), JEDEC MO-137, 0.150" Wide  
24-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide  
Devices also available in Tape and Reel. Specify by appending the suffix letter Xto the ordering code.  
Logic Symbol  
Pin Descriptions  
Pin Names  
Description  
Output Enable Input  
OE  
T/R  
Transmit/Receive Input  
A0A7  
B0B7  
Side A Inputs or 3-STATE Outputs  
Side B Inputs or 3-STATE Outputs  
Connection Diagram  
Truth Table  
Inputs  
Outputs  
OE  
L
T/R  
L
Bus B Data to Bus A  
Bus A Data to Bus B  
HIGH-Z State  
L
H
H
X
H = HIGH Voltage Level  
L = LOW Voltage Level  
X = Immaterial  
© 2003 Fairchild Semiconductor Corporation  
DS011540  
www.fairchildsemi.com  

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