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74LVX257TTR PDF预览

74LVX257TTR

更新时间: 2024-11-26 21:54:11
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS 解复用器逻辑集成电路光电二极管输入元件
页数 文件大小 规格书
10页 261K
描述
LOW VOLTAGE CMOS QUAD 2 CHANNEL MULTIPLEXER (3-STATE) WITH 5V TOLERANT INPUTS

74LVX257TTR 技术参数

是否Rohs认证:符合生命周期:Obsolete
零件包装代码:TSSOP包装说明:TSSOP-16
针数:16Reach Compliance Code:compliant
HTS代码:8542.39.00.01Factory Lead Time:25 weeks 5 days
风险等级:5.52Is Samacsys:N
系列:LV/LV-A/LVX/HJESD-30 代码:R-PDSO-G16
JESD-609代码:e4长度:5 mm
负载电容(CL):50 pF逻辑集成电路类型:MULTIPLEXER
最大I(ol):0.004 A湿度敏感等级:3
功能数量:4输入次数:2
输出次数:1端子数量:16
最高工作温度:125 °C最低工作温度:-55 °C
输出特性:3-STATE输出极性:TRUE
封装主体材料:PLASTIC/EPOXY封装代码:TSSOP
封装等效代码:TSSOP16,.25封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH包装方法:TAPE AND REEL
电源:3.3 VProp。Delay @ Nom-Sup:15.5 ns
传播延迟(tpd):21.3 ns认证状态:Not Qualified
座面最大高度:1.2 mm子类别:Multiplexer/Demultiplexers
最大供电电压 (Vsup):3.6 V最小供电电压 (Vsup):2 V
标称供电电压 (Vsup):2.7 V表面贴装:YES
技术:CMOS温度等级:MILITARY
端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)端子形式:GULL WING
端子节距:0.65 mm端子位置:DUAL
宽度:4.4 mmBase Number Matches:1

74LVX257TTR 数据手册

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74LVX257  
LOW VOLTAGE CMOS QUAD 2 CHANNEL MULTIPLEXER  
(3-STATE) WITH 5V TOLERANT INPUTS  
HIGH SPEED:  
t
=5.8ns (TYP.) at V = 3.3V  
PD  
CC  
5V TOLERANT INPUTS  
POWER-DOWN PROTECTION ON INPUTS  
INPUT VOLTAGE LEVEL:  
V
= 0.8V, V = 2V at V =3V  
IL  
IH CC  
SOP  
TSSOP  
LOW POWER DISSIPATION:  
= 4 µA (MAX.) at T =25°C  
I
CC  
A
LOW NOISE:  
= 0.3V (TYP.) at V =3.3V  
V
ORDER CODES  
PACKAGE  
OLP  
CC  
SYMMETRICAL OUTPUT IMPEDANCE:  
|I | = I = 4 mA (MIN) at V =3V  
TUBE  
T & R  
OH  
OL  
CC  
SOP  
74LVX257M  
74LVX257MTR  
74LVX257TTR  
BALANCED PROPAGATION DELAYS:  
TSSOP  
t
t
PLH  
PHL  
OPERATING VOLTAGE RANGE:  
(OPR) = 2V to 3.6V (1.2V Data Retention)  
V
multiplexer. When the ENABLE INPUT is held  
"High", all outputs become in high impedance  
state. If SELECT INPUT is held "Low", "A" data is  
selected, when SELECT INPUT is "High", "B"  
data is chosen.  
CC  
PIN AND FUNCTION COMPATIBLE WITH  
74 SERIES 257  
IMPROVED LATCH-UP IMMUNITY  
Power down protection is provided on all inputs  
and 0 to 7V can be accepted on inputs with no  
regard to the supply voltage.  
This device can be used to interface 5V to 3V. It  
combines high speed performance with the true  
CMOS low power consumption.  
All inputs and outputs are equipped with  
protection circuits against static discharge, giving  
them 2KV ESD immunity and transient excess  
voltage.  
DESCRIPTION  
The 74LVX257 is a low voltage CMOS QUAD 2  
CHANNEL MULTIPLEXER (3-STATE) fabricated  
with sub-micron silicon gate and double-layer  
2
metal wiring C MOS technology. It is ideal for low  
power, battery operated and low noise 3.3V  
applications.  
It is composed of four independent 2-channel  
multiplexers with common SELECT and ENABLE  
(OE) INPUT. The 74LVX257 is a non-inverting  
PIN CONNECTION AND IEC LOGIC SYMBOLS  
July 2001  
1/10  

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