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74LVX14SJX PDF预览

74LVX14SJX

更新时间: 2024-11-10 22:41:03
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 栅极触发器逻辑集成电路光电二极管
页数 文件大小 规格书
7页 89K
描述
Low Voltage Hex Inverter with Schmitt Trigger Input

74LVX14SJX 技术参数

是否无铅:不含铅是否Rohs认证:符合
生命周期:Obsolete零件包装代码:SOP
包装说明:5.30 MM, LEAD FREE, EIAJ TYPE2, SOP-14针数:14
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.16
Is Samacsys:N系列:LV/LV-A/LVX/H
JESD-30 代码:R-PDSO-G14JESD-609代码:e3
长度:10.2 mm负载电容(CL):50 pF
逻辑集成电路类型:INVERTER湿度敏感等级:1
功能数量:6输入次数:1
端子数量:14最高工作温度:85 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装等效代码:SOP14,.3
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
包装方法:TAPE AND REEL峰值回流温度(摄氏度):260
电源:3.3 VProp。Delay @ Nom-Sup:16 ns
传播延迟(tpd):23 ns认证状态:Not Qualified
施密特触发器:YES座面最大高度:2.1 mm
子类别:Gates最大供电电压 (Vsup):3.6 V
最小供电电压 (Vsup):2 V标称供电电压 (Vsup):2.7 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:Matte Tin (Sn)
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:5.3 mmBase Number Matches:1

74LVX14SJX 数据手册

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March 1993  
Revised February 2005  
74LVX14  
Low Voltage Hex Inverter with Schmitt Trigger Input  
General Description  
Features  
The LVX14 contains six inverter gates each with a Schmitt  
trigger input. They are capable of transforming slowly  
changing input signals into sharply defined, jitter-free out-  
put signals. In addition, they have a greater noise margin  
than conventional inverters.  
Input voltage level translation from 5V to 3V  
Ideal for low power/low noise 3.3V applications  
Guaranteed simultaneous switching noise level and  
dynamic threshold performance  
The LVX14 has hysteresis between the positive-going and  
negative-going input thresholds (typically 1.0V) which is  
determined internally by transistor ratios and is essentially  
insensitive to temperature and supply voltage variations.  
The inputs tolerate voltages up to 7V allowing the interface  
of 5V systems to 3V systems.  
Ordering Code:  
Package  
Order Number  
Package Description  
Number  
74LVX14M  
M14A  
M14A  
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow  
Pb-Free 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow  
Pb-Free 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide  
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide  
74LVX14MX_NL  
74LVX14SJ  
M14D  
74LVX14MTC  
MTC14  
MTC14  
74LVX14MTCX_NL  
(Note 1)  
Pb-Free 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm  
Wide  
Devices also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.  
Pb-Free package per JEDEC J-STD-020B.  
Note 1: “_NL” indicates Pb-Free package (per JEDEC J-STD-020B). Device available in Tape and Reel only.  
© 2005 Fairchild Semiconductor Corporation  
DS011603  
www.fairchildsemi.com  

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