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74LVX02MTC PDF预览

74LVX02MTC

更新时间: 2024-11-10 22:35:31
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 栅极触发器逻辑集成电路光电二极管
页数 文件大小 规格书
6页 88K
描述
Low Voltage Quad 2-Input NOR Gate

74LVX02MTC 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Obsolete零件包装代码:TSSOP
包装说明:4.40 MM, MO-153AB, TSSOP-14针数:14
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.4
Is Samacsys:N系列:LV/LV-A/LVX/H
JESD-30 代码:R-PDSO-G14JESD-609代码:e4
长度:5 mm负载电容(CL):50 pF
逻辑集成电路类型:NOR GATE最大I(ol):0.004 A
湿度敏感等级:1功能数量:4
输入次数:2端子数量:14
最高工作温度:85 °C最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY封装代码:TSSOP
封装等效代码:TSSOP14,.25封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH峰值回流温度(摄氏度):260
电源:3.3 VProp。Delay @ Nom-Sup:11.5 ns
传播延迟(tpd):17 ns认证状态:Not Qualified
施密特触发器:NO座面最大高度:1.2 mm
子类别:Gates最大供电电压 (Vsup):3.6 V
最小供电电压 (Vsup):2 V标称供电电压 (Vsup):2.7 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式:GULL WING端子节距:0.65 mm
端子位置:DUAL处于峰值回流温度下的最长时间:30
宽度:4.4 mmBase Number Matches:1

74LVX02MTC 数据手册

 浏览型号74LVX02MTC的Datasheet PDF文件第2页浏览型号74LVX02MTC的Datasheet PDF文件第3页浏览型号74LVX02MTC的Datasheet PDF文件第4页浏览型号74LVX02MTC的Datasheet PDF文件第5页浏览型号74LVX02MTC的Datasheet PDF文件第6页 
May 1993  
Revised February 2005  
74LVX02  
Low Voltage Quad 2-Input NOR Gate  
General Description  
The LVX02 contains four 2-input NOR gates. The inputs  
tolerate voltages up to 7V allowing the interface of 5V sys-  
tems to 3V systems.  
Features  
Input voltage level translation from 5V to 3V  
Ideal for low power/low noise 3.3V applications  
Guaranteed simultaneous switching noise level and  
dynamic threshold performance  
Ordering Code  
Package  
Order Number  
Package Description  
Number  
74LVX02M  
M14A  
M14D  
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow  
Pb-Free 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide  
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide  
74LVX02SJ  
74LVX02MTC  
MTC14  
MTC14  
74LVX02MTCX_NL  
(Note 1)  
Pb-Free 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm  
Wide  
Devices also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.  
Pb-Free package per JEDEC J-STD-020B.  
Note 1: “_NL” indicates Pb-Free package (per JEDEC J-STD-020B). Device available in Tape and Reel only.  
Logic Symbol  
Connection Diagram  
IEEE/IEC  
Pin Descriptions  
Pin Names  
An, Bn  
On  
Description  
Inputs  
Outputs  
© 2005 Fairchild Semiconductor Corporation  
DS011600  
www.fairchildsemi.com  

74LVX02MTC 替代型号

型号 品牌 替代类型 描述 数据表
74LVX02TTR STMICROELECTRONICS

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LOW VOLTAGE CMOS QUAD 2-INPUT NOR GATE WITH 5V TOLERANT INPUTS
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Quad 2-Input NOR Gate

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