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74LVU04PW,112 PDF预览

74LVU04PW,112

更新时间: 2024-11-03 15:26:39
品牌 Logo 应用领域
恩智浦 - NXP 光电二极管逻辑集成电路触发器
页数 文件大小 规格书
20页 226K
描述
74LVU04 - Hex inverter TSSOP 14-Pin

74LVU04PW,112 技术参数

是否Rohs认证: 符合生命周期:Obsolete
零件包装代码:TSSOP包装说明:TSSOP, TSSOP14,.25
针数:14Reach Compliance Code:compliant
HTS代码:8542.39.00.01风险等级:5.26
系列:LV/LV-A/LVX/HJESD-30 代码:R-PDSO-G14
JESD-609代码:e4长度:5 mm
负载电容(CL):50 pF逻辑集成电路类型:INVERTER
最大I(ol):0.006 A湿度敏感等级:1
功能数量:6输入次数:1
端子数量:14最高工作温度:125 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装等效代码:TSSOP14,.25
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
包装方法:TUBE峰值回流温度(摄氏度):260
电源:3.3 VProp。Delay @ Nom-Sup:10 ns
传播延迟(tpd):17 ns认证状态:Not Qualified
施密特触发器:NO座面最大高度:1.1 mm
子类别:Gates最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):1 V标称供电电压 (Vsup):3.3 V
表面贴装:YES技术:CMOS
温度等级:AUTOMOTIVE端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式:GULL WING端子节距:0.65 mm
端子位置:DUAL处于峰值回流温度下的最长时间:30
宽度:4.4 mmBase Number Matches:1

74LVU04PW,112 数据手册

 浏览型号74LVU04PW,112的Datasheet PDF文件第2页浏览型号74LVU04PW,112的Datasheet PDF文件第3页浏览型号74LVU04PW,112的Datasheet PDF文件第4页浏览型号74LVU04PW,112的Datasheet PDF文件第5页浏览型号74LVU04PW,112的Datasheet PDF文件第6页浏览型号74LVU04PW,112的Datasheet PDF文件第7页 
74LVU04  
Hex unbuffered inverter  
Rev. 7 — 18 September 2014  
Product data sheet  
1. General description  
The 74LVU04 is a low-voltage Si-gate CMOS device that is pin and function compatible  
with 74HCU04.  
The 74LVU04 is a general purpose hex inverter. Each of the six inverters is a single stage  
with unbuffered outputs.  
2. Features and benefits  
Wide operating voltage: 1.0 V to 5.5 V  
Optimized for low voltage applications: 1.0 V to 3.6 V  
Typical output ground bounce < 0.8 V at VCC = 3.3 V and Tamb = 25 C  
Typical HIGH-level output voltage (VOH) undershoot: > 2 V at VCC = 3.3 V and  
Tamb = 25 C  
ESD protection:  
HBM JESD22-A114F exceeds 2000 V  
MM JESD22-A115-A exceeds 200 V  
Multiple package options  
Specified from 40 C to +85 C and from 40 C to +125 C  
3. Applications  
Linear amplifier  
Crystal oscillator  
Astable multivibrator  
 
 
 

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