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74LVTH373MTCX_NL PDF预览

74LVTH373MTCX_NL

更新时间： 2024-09-16 13:04:59
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 锁存器
页数 文件大小 规格书
10页 311K
描述
Bus Driver, LVT Series, 1-Func, 8-Bit, True Output, BICMOS, PDSO20, 4.40 MM, LEAD FREE, MO-153, TSSOP-20

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74LVTH373MTCX_NL 技术参数

是否Rohs认证： 符合生命周期：Obsolete
零件包装代码：TSSOP包装说明：TSSOP, TSSOP20,.25
针数：20Reach Compliance Code：compliant
风险等级：5.16系列：LVT
JESD-30 代码：R-PDSO-G20JESD-609代码：e3
长度：6.5 mm逻辑集成电路类型：BUS DRIVER
最大I（ol）：0.064 A湿度敏感等级：1
位数：8功能数量：1
端口数量：2端子数量：20
最高工作温度：85 °C最低工作温度：-40 °C
输出特性：3-STATE输出极性：TRUE
封装主体材料：PLASTIC/EPOXY封装代码：TSSOP
封装等效代码：TSSOP20,.25封装形状：RECTANGULAR
封装形式：SMALL OUTLINE, THIN PROFILE, SHRINK PITCH包装方法：TAPE AND REEL
峰值回流温度（摄氏度）：260电源：3.3 V
Prop。Delay @ Nom-Sup：4.5 ns传播延迟（tpd）：5 ns
认证状态：Not Qualified座面最大高度：1.2 mm
子类别：FF/Latches最大供电电压 (Vsup)：3.6 V
最小供电电压 (Vsup)：2.7 V标称供电电压 (Vsup)：3.3 V
表面贴装：YES技术：BICMOS
温度等级：INDUSTRIAL端子面层：Matte Tin (Sn)
端子形式：GULL WING端子节距：0.65 mm
端子位置：DUAL处于峰值回流温度下的最长时间：NOT SPECIFIED
宽度：4.4 mmBase Number Matches：1

74LVTH373MTCX_NL 数据手册

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February 2008  
74LVT373, 74LVTH373  
Low Voltage Octal Transparent Latch with 3-STATE Outputs  
Features  
General Description  
■ Input and output interface capability to systems at  
The LVT373 and LVTH373 consist of eight latches with  
3-STATE outputs for bus organized system applications.  
The latches appear transparent to the data when Latch  
Enable (LE) is HIGH. When LE is LOW, the data satisfy-  
ing the input timing requirements is latched. Data  
appears on the bus when the Output Enable (OE) is  
LOW. When OE is HIGH, the bus output is in a high  
impedance state.  
5V V  
CC  
■ Bushold data inputs eliminate the need for external  
pull-up resistors to hold unused inputs (74LVTH373),  
also available without bushold feature (74LVT373)  
■ Live insertion/extraction permitted  
■ Power Up/Down high impedance provides glitch-free  
bus loading  
The LVTH373 data inputs include bushold, eliminating  
the need for external pull-up resistors to hold unused  
inputs.  
■ Outputs source/sink –32 mA/+64 mA  
■ Functionally compatible with the 74 series 373  
■ ESD performance:  
These octal latches are designed for low-voltage (3.3V)  
– Human-body model > 2000V  
– Machine model > 200V  
V
applications, but with the capability to provide a TTL  
CC  
interface to a 5V environment. The LVT373 and  
LVTH373 are fabricated with an advanced BiCMOS  
technology to achieve high speed operation similar to 5V  
ABT while maintaining low power dissipation.  
– Charged-device model > 1000V  
Ordering Information  
Package  
Order Number  
74LVT373WM  
74LVT373SJ  
Number  
Package Description  
M20B  
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide  
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide  
M20D  
74LVT373MTC  
MTC20  
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm  
Wide  
74LVTH373WM  
74LVTH373SJ  
74LVTH373MTC  
M20B  
M20D  
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide  
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide  
MTC20  
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm  
Wide  
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering number.  
All packages are lead free per JEDEC: J-STD-020B standard.  
©1999 Fairchild Semiconductor Corporation  
74LVT373, 74LVTH373 Rev. 1.5.0  
www.fairchildsemi.com  
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