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74LVTH32952 PDF预览

74LVTH32952

更新时间: 2024-11-08 22:36:11
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飞兆/仙童 - FAIRCHILD /
页数 文件大小 规格书
6页 68K
描述
Low Voltage 32-Bit Registered Transceiver with 3-STATE Outputs (Preliminary)

74LVTH32952 数据手册

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Preliminary  
September 2000  
Revised August 2001  
74LVTH32952  
Low Voltage 32-Bit Registered Transceiver  
with 3-STATE Outputs (Preliminary)  
General Description  
Features  
Input and output interface capability to systems at  
The LVTH32952 is a 32-bit registered transceiver. Four  
8-bit back to back registers store data flowing in both direc-  
tions between two bidirectional buses. Separate clock,  
clock enable, and output enable signals are provided for  
each register.  
5V VCC  
Bushold data inputs eliminate the need for external  
pull-up resistors to hold unused inputs  
Live insertion/extraction permitted  
The LVTH32952 data inputs include bushold, eliminating  
the need for external pull-up resistors to hold unused  
inputs.  
Power Up/Down high impedance provides glitch-free  
bus loading  
Outputs source/sink 32 mA/+64 mA  
ESD performance:  
The registered transceiver is designed for low voltage  
(3.3V) VCC applications, but with the capability to provide a  
Human-body model > 2000V  
Machine model > 200V  
TTL interface to a 5V environment.  
The LVTH32952 is fabricated with an advanced BiCMOS  
technology to achieve high speed operation similar to 5V  
ABT while maintaining low power dissipation.  
Charged-device model > 1000V  
Packaged in plastic Fine-Pitch Ball Grid Array (FBGA)  
(Preliminary)  
Ordering Code:  
Order Number Package Number  
Package Description  
74LVTH32952GX  
(Note 1)  
BGA114A  
(Preliminary)  
114-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide  
[TAPE and REEL]  
Note 1: BGA package available in Tape and Reel only.  
© 2001 Fairchild Semiconductor Corporation  
DS500411  
www.fairchildsemi.com  

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