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74LVTH32245 PDF预览

74LVTH32245

更新时间: 2024-11-06 05:05:51
品牌 Logo 应用领域
恩智浦 - NXP 总线收发器
页数 文件大小 规格书
13页 93K
描述
3.3 V 32-bit bus transceiver; 3-state

74LVTH32245 数据手册

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74LVTH32245  
3.3 V 32-bit bus transceiver; 3-state  
Rev. 01 — 23 January 2008  
Product data sheet  
1. General description  
The 74LVTH32245 is a high-performance BiCMOS product designed for VCC operation at  
3.3 V. The 74LVTH32245 is a 32-bit transceiver featuring non-inverting 3-state bus  
compatible outputs in both send and receive directions. The device features four output  
enable (nOE) inputs for easy cascading and four send/receive (nDIR) inputs for direction  
control. Pin nOE controls the outputs so that the buses are effectively isolated. Bus hold  
on data inputs eliminates the need for external pull-up resistors to hold unused inputs.  
2. Features  
I 32-bit bidirectional bus interface  
I 3-state buffers  
I Output capability: +64 mA and 32 mA  
I TTL input and output switching levels  
I Input and output interface capability to systems at 5 V supply  
I Bus hold data inputs eliminate need for external pull-up resistors to hold unused inputs  
I Live insertion and extraction permitted  
I Power-up 3-state  
I No bus current loading when output is tied to 5 V bus  
I Latch-up protection:  
N JESD78 Class II level A exceeds 500 mA  
I ESD protection:  
N HBM JESD22-A114E exceeds 2000 V  
N MM JESD22-A115-A exceeds 200 V  
3. Ordering information  
Table 1.  
Ordering information  
Type number  
Package  
Temperature range Name  
Description  
Version  
74LVTH32245EC  
40 °C to +85 °C  
LFBGA96 plastic low profile fine-pitch ball grid array package; SOT536-1  
96 balls; body 13.5 × 5.5 × 1.05 mm  

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