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74LVTH245MSAX_NL PDF预览

74LVTH245MSAX_NL

更新时间: 2024-11-09 13:04:59
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD /
页数 文件大小 规格书
8页 105K
描述
Bus Transceiver, LVT Series, 1-Func, 8-Bit, True Output, BICMOS, PDSO20, 5.30 MM, LEAD FREE, MO-150, SSOP-20

74LVTH245MSAX_NL 技术参数

生命周期:Obsolete零件包装代码:SSOP
包装说明:SSOP,针数:20
Reach Compliance Code:unknown风险等级:5.64
Is Samacsys:N其他特性:WITH DIRECTION CONTROL
系列:LVTJESD-30 代码:R-PDSO-G20
JESD-609代码:e3长度:7.2 mm
逻辑集成电路类型:BUS TRANSCEIVER位数:8
功能数量:1端口数量:2
端子数量:20最高工作温度:85 °C
最低工作温度:-40 °C输出特性:3-STATE
输出极性:TRUE封装主体材料:PLASTIC/EPOXY
封装代码:SSOP封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, SHRINK PITCH传播延迟(tpd):4 ns
认证状态:Not Qualified座面最大高度:2.05 mm
最大供电电压 (Vsup):3.6 V最小供电电压 (Vsup):2.7 V
标称供电电压 (Vsup):3.3 V表面贴装:YES
技术:BICMOS温度等级:INDUSTRIAL
端子面层:MATTE TIN端子形式:GULL WING
端子节距:0.65 mm端子位置:DUAL
宽度:5.3 mmBase Number Matches:1

74LVTH245MSAX_NL 数据手册

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November 1999  
Revised March 2005  
74LVT245 74LVTH245  
Low Voltage Octal Bidirectional Transceiver  
with 3-STATE Inputs/Outputs  
General Description  
Features  
Input and output interface capability to systems at  
The LVT245 and LVTH245 contain eight non-inverting bidi-  
rectional buffers with 3-STATE outputs and are intended for  
bus-oriented applications. The Transmit/Receive (T/R)  
input determines the direction of data flow through the bidi-  
rectional transceiver. Transmit (active-HIGH) enables data  
from A ports to B ports; Receive (active-LOW) enables  
data from B ports to A ports. The Output Enable input,  
when HIGH, disables both A and B ports by placing them in  
a HIGH Z condition.  
5V VCC  
Bushold data inputs eliminate the need for external  
pull-up resistors to hold unused inputs (74LVTH245),  
also available without bushold feature (74LVT245)  
Live insertion/extraction permitted  
Power Up/Down high impedance provides glitch-free  
bus loading  
Outputs source/sink, 32 mA/ 64 mA  
Latch-up performance exceeds 500 mA  
ESD performance:  
The LVTH245 data inputs include bushold, eliminating the  
need for external pull-up resistors to hold unused inputs.  
These transceivers are designed for low-voltage (3.3V)  
VCC applications, but with the capability to provide a TTL  
Human-body model 2000V  
Machine model 200V  
interface to a 5V environment. The LVT245 and LVTH245  
are fabricated with an advanced BiCMOS technology to  
achieve high speed operation similar to 5V ABT while  
maintaining a low power dissipation.  
Charged-device model 1000V  
Ordering Code:  
Package  
Order Number  
Package Description  
Number  
74LVT245WM  
74LVT245SJ  
M20B  
M20D  
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide  
Pb-Free 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide  
20-Lead Shrink Small Outline Package (SSOP), JEDEC MO-150, 5.3mm Wide  
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide  
74LVT245MSA  
74LVT245MTC  
MSA20  
MTC20  
MTC20  
74LVT245MTCX_NL  
(Note 1)  
Pb-Free 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm  
Wide  
74LVTH245WM  
74LVTH245SJ  
M20B  
M20D  
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide  
Pb-Free 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide  
20-Lead Shrink Small Outline Package (SSOP), JEDEC MO-150, 5.3mm Wide  
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide  
74LVTH245MSA  
74LVTH245MTC  
MSA20  
MTC20  
MTC20  
74LVTH245MTCX_NL  
(Note 1)  
Pb-Free 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm  
Wide  
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.  
Pb-Free package per JEDEC J-STD-020B.  
Note 1: “_NL” indicates Pb-Free package (per JEDEC J-STD-020B). Device available in Tape and Reel only.  
© 2005 Fairchild Semiconductor Corporation  
DS500203  
www.fairchildsemi.com  

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