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74LVTH2244SJ PDF预览

74LVTH2244SJ

更新时间： 2024-11-17 22:56:23
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 驱动器逻辑集成电路光电二极管信息通信管理
页数 文件大小 规格书
7页 96K
描述
Low Voltage Octal Buffer/Line Driver with 3-STATE Outputs

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中文翻译

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74LVTH2244SJ 技术参数

是否Rohs认证： 符合生命周期：Obsolete
零件包装代码：SOIC包装说明：SOP, SOP20,.3
针数：20Reach Compliance Code：compliant
风险等级：5.44控制类型：ENABLE LOW
系列：LVTJESD-30 代码：R-PDSO-G20
JESD-609代码：e3长度：12.6 mm
逻辑集成电路类型：BUS DRIVER最大I（ol）：0.012 A
湿度敏感等级：1位数：4
功能数量：2端口数量：2
端子数量：20最高工作温度：85 °C
最低工作温度：-40 °C输出特性：3-STATE WITH SERIES RESISTOR
输出极性：TRUE封装主体材料：PLASTIC/EPOXY
封装代码：SOP封装等效代码：SOP20,.3
封装形状：RECTANGULAR封装形式：SMALL OUTLINE
包装方法：RAIL峰值回流温度（摄氏度）：260
电源：3.3 VProp。Delay @ Nom-Sup：4.4 ns
传播延迟（tpd）：5.3 ns认证状态：Not Qualified
座面最大高度：2.1 mm子类别：Bus Driver/Transceivers
最大供电电压 (Vsup)：3.6 V最小供电电压 (Vsup)：2.7 V
标称供电电压 (Vsup)：3.3 V表面贴装：YES
技术：BICMOS温度等级：INDUSTRIAL
端子面层：Matte Tin (Sn)端子形式：GULL WING
端子节距：1.27 mm端子位置：DUAL
处于峰值回流温度下的最长时间：NOT SPECIFIED宽度：5.3 mm
Base Number Matches：1

74LVTH2244SJ 数据手册

 浏览型号74LVTH2244SJ的Datasheet PDF文件第2页浏览型号74LVTH2244SJ的Datasheet PDF文件第3页浏览型号74LVTH2244SJ的Datasheet PDF文件第4页浏览型号74LVTH2244SJ的Datasheet PDF文件第5页浏览型号74LVTH2244SJ的Datasheet PDF文件第6页浏览型号74LVTH2244SJ的Datasheet PDF文件第7页 
July 1999  
Revised March 2005  
74LVT2244 • 74LVTH2244  
Low Voltage Octal Buffer/Line Driver  
with 3-STATE Outputs  
and 25: Series Resistors in the Outputs  
General Description  
Features  
■ Input and output interface capability to systems at  
The LVT2244 and LVTH2244 are octal buffers and line  
drivers designed to be employed as memory address driv-  
ers, clock drivers and bus oriented transmitters or receivers  
which provides improved PC board density. The equivalent  
25 -Series resistors helps reduce output overshoot and  
undershoot.  
5V VCC  
■ Equivalent 25 -Series resistors on outputs  
■ Bushold data inputs eliminate the need for external  
pull-up resistors to hold unused inputs (74LVTH2244),  
also available without bushold feature (74LVT2244).  
The LVTH2244 data inputs include bushold, eliminating the  
need for external pull-up resistors to hold unused inputs.  
■ Live insertion/extraction permitted  
■ Power Up/Down high impedance provides glitch-free  
bus loading  
These octal buffers and line drivers are designed for low-  
voltage (3.3V) VCC applications, but with the capability to  
■ Outputs source/sink 12 mA/ 12 mA  
■ Latch-up performance exceeds 500 mA  
■ ESD performance:  
provide a TTL interface to a 5V environment. The LVT2244  
and LVTH2244 are fabricated with an advanced BiCMOS  
technology to achieve high speed operation similar to 5V  
ABT while maintaining low power dissipation.  
Human-body model 2000V  
Machine model 200V  
Charged-device model 1000V  
Ordering Code:  
Package  
Order Number  
Package Description  
Number  
74LVT2244WM  
74LVT2244SJ  
74LVT2244MTC  
M20B  
M20D  
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide  
Pb-Free 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide  
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide  
MTC20  
MTC20  
74LVT2244MTCX_NL  
(Note 1)  
Pb-Free 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm  
Wide  
74LVTH2244WM  
74LVTH2244SJ  
74LVTH2244MTC  
M20B  
M20D  
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide  
Pb-Free 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide  
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide  
MTC20  
MTC20  
74LVTH2244MTCX_NL  
(Note 1)  
Pb-Free 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm  
Wide  
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.  
Pb-Free package per JEDEC J-STD-020B.  
Note 1: “_NL” indicates Pb-Free package (per JEDEC J-STD-020B). Device available in Tape and Reel only.  
© 2005 Fairchild Semiconductor Corporation  
DS012170  
www.fairchildsemi.com  
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 		Low Voltage Octal Bidirectional Transceiver w
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