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74LVTH16244LBR PDF预览

74LVTH16244LBR

更新时间: 2024-11-06 05:05:51
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS 总线驱动器总线收发器逻辑集成电路信息通信管理高压
页数 文件大小 规格书
13页 189K
描述
LOW VOLTAGE BICMOS 16 BIT BUS BUFFER WITH BUS HOLD AND POWER UP 3-STATE

74LVTH16244LBR 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Obsolete零件包装代码:BGA
包装说明:TFBGA, BGA54,6X9,32针数:54
Reach Compliance Code:compliantHTS代码:8542.39.00.01
风险等级:5.59控制类型:ENABLE LOW
系列:LVTJESD-30 代码:R-PBGA-B54
JESD-609代码:e1长度:8 mm
负载电容(CL):50 pF逻辑集成电路类型:BUS DRIVER
最大I(ol):0.064 A湿度敏感等级:3
位数:1功能数量:16
端口数量:2端子数量:54
最高工作温度:85 °C最低工作温度:-40 °C
输出特性:3-STATE输出极性:TRUE
封装主体材料:PLASTIC/EPOXY封装代码:TFBGA
封装等效代码:BGA54,6X9,32封装形状:RECTANGULAR
封装形式:GRID ARRAY, THIN PROFILE, FINE PITCH包装方法:TAPE AND REEL
峰值回流温度(摄氏度):260电源:3.3 V
Prop。Delay @ Nom-Sup:3.2 ns传播延迟(tpd):3.7 ns
认证状态:Not Qualified座面最大高度:1.2 mm
子类别:Bus Driver/Transceivers最大供电电压 (Vsup):3.6 V
最小供电电压 (Vsup):2.7 V标称供电电压 (Vsup):3.3 V
表面贴装:YES技术:BICMOS
温度等级:INDUSTRIAL端子面层:Tin/Silver/Copper (Sn95.5Ag4.0Cu0.5)
端子形式:BALL端子节距:0.8 mm
端子位置:BOTTOM处于峰值回流温度下的最长时间:30
宽度:5.5 mmBase Number Matches:1

74LVTH16244LBR 数据手册

 浏览型号74LVTH16244LBR的Datasheet PDF文件第2页浏览型号74LVTH16244LBR的Datasheet PDF文件第3页浏览型号74LVTH16244LBR的Datasheet PDF文件第4页浏览型号74LVTH16244LBR的Datasheet PDF文件第5页浏览型号74LVTH16244LBR的Datasheet PDF文件第6页浏览型号74LVTH16244LBR的Datasheet PDF文件第7页 
74LVTH16244  
LOW VOLTAGE BICMOS 16 BIT BUS BUFFER  
WITH BUS HOLD AND POWER UP 3-STATE  
HIGH SPEED:  
= 3.2ns (MAX.) at T = 85°C V = 3.0V  
LOW POWER DISSIPATION HIGH LEVEL  
t
PD  
A
CC  
OUTPUT: I = 190µA (MAX.) at T = 85°C  
CC  
A
OUTPUT IMPEDANCE:  
|I | = 32mA, I = 64mA (MIN at V = 3.0V)  
OH  
OL  
CC  
|I | = 8mA, I = 24mA (MIN at V = 2.7V)  
OH  
OL  
CC  
TSSOP  
TFBGA  
BALANCED PROPAGATION DELAYS:  
t
t
PLH  
PHL  
POWER DOWN PROTECTION ON INPUTS  
AND OUTPUTS  
COMPATIBLE WITH TTL OUTPUTS:  
ORDER CODES  
PACKAGE  
T & R  
TSSOP48  
TFBGA54  
74LVTH16244TTR  
74LVTH16244LBR  
V
= 2V (MIN),V = 0.8V(MAX) at  
IH  
IL  
V
= 2.7 to 3.6V  
CC  
POWER-UP/DOWN 3-STATE: I  
= 100µA  
OZPU  
LOGIC DIAGRAM  
MAX at V = 0V to 1.5V, V = 1.5V to 0V, T  
CC  
CC  
A
= 85°C  
BUS HOLD PROVIDED ON DATA INPUTS  
OPERATING VOLTAGE RANGE:  
V
(OPR) = 2.7V to 3.6V  
CC  
PIN AND FUNCTION COMPATIBLE WITH  
74 SERIES H16244  
LATCH-UP PERFORMANCE EXCEEDS  
500mA (JESD 17)  
DESCRIPTION  
The 74LVTH16244 is a low voltage BiCMOS 16  
BIT BUS BUFFER (NON-INVERTED) fabricated  
with sub-micron silicon gate and five-layer metal  
wiring BiCMOS technology. It is ideal and full  
specified for hot-insertion and high speed 3.3V ap-  
plications; the power-up/down 3-state circuitry  
places the outputs in the high impedance state  
during power-up/down, which prevents driver con-  
flict. This function is guaranteed when V  
is be-  
CC  
tween 0 and 1.5V. It can be interfaced to 3.3V sig-  
nal environment for both inputs and outputs. Any  
nG output control governs four BUS BUFFERS.  
Output Enable input (nG) tied together gives full  
16-bit operation. When nG is LOW, the outputs  
are on. When nG is HIGH, the output are in high  
impedance state effectively isolated. Bus hold on  
data inputs is provided in order to eliminate the  
need for external pull-up or pull-down resistors.  
All inputs and outputs are equipped with protec-  
tion circuits against static discharge, giving them  
ESD immunity and transient excess voltage.  
February 2004  
1/13  

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