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74LVTH162240DLG4 PDF预览

74LVTH162240DLG4

更新时间: 2024-02-18 16:04:28
品牌 Logo 应用领域
德州仪器 - TI 总线驱动器总线收发器逻辑集成电路光电二极管输出元件信息通信管理
页数 文件大小 规格书
12页 137K
描述
3.3-V ABT 16-BIT BUFFERS/DRIVERS WITH 3-STATE OUTPUTS

74LVTH162240DLG4 技术参数

是否无铅:不含铅是否Rohs认证:符合
生命周期:Obsolete零件包装代码:SSOP
包装说明:GREEN, PLASTIC, SSOP-48针数:48
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.14Is Samacsys:N
控制类型:ENABLE LOW系列:LVT
JESD-30 代码:R-PDSO-G48JESD-609代码:e4
长度:15.875 mm负载电容(CL):50 pF
逻辑集成电路类型:BUS DRIVER最大I(ol):0.012 A
湿度敏感等级:1位数:4
功能数量:4端口数量:2
端子数量:48最高工作温度:85 °C
最低工作温度:-40 °C输出特性:3-STATE WITH SERIES RESISTOR
输出极性:INVERTED封装主体材料:PLASTIC/EPOXY
封装代码:SSOP封装等效代码:SSOP48,.4
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, SHRINK PITCH
包装方法:TUBE峰值回流温度(摄氏度):260
电源:3.3 VProp。Delay @ Nom-Sup:4 ns
传播延迟(tpd):4.6 ns认证状态:Not Qualified
座面最大高度:2.79 mm子类别:Bus Driver/Transceivers
最大供电电压 (Vsup):3.6 V最小供电电压 (Vsup):2.7 V
标称供电电压 (Vsup):3.3 V表面贴装:YES
技术:BICMOS温度等级:INDUSTRIAL
端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)端子形式:GULL WING
端子节距:0.635 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:7.49 mm
Base Number Matches:1

74LVTH162240DLG4 数据手册

 浏览型号74LVTH162240DLG4的Datasheet PDF文件第2页浏览型号74LVTH162240DLG4的Datasheet PDF文件第3页浏览型号74LVTH162240DLG4的Datasheet PDF文件第4页浏览型号74LVTH162240DLG4的Datasheet PDF文件第5页浏览型号74LVTH162240DLG4的Datasheet PDF文件第6页浏览型号74LVTH162240DLG4的Datasheet PDF文件第7页 
SN54LVTH162240, SN74LVTH162240  
3.3-V ABT 16-BIT BUFFERS/DRIVERS  
WITH 3-STATE OUTPUTS  
www.ti.com  
SCBS685FMARCH 1997REVISED NOVEMBER 2006  
FEATURES  
SN54LVTH162240. . . WD PACKAGE  
SN74LVTH162240. . . DGG OR DL PACKAGE  
(TOP VIEW)  
Members of the Texas Instruments Widebus™  
Family  
State-of-the-Art Advanced BiCMOS  
Technology (ABT) Design for 3.3-V Operation  
and Low Static-Power Dissipation  
1OE  
1Y1  
1Y2  
GND  
1Y3  
1Y4  
2OE  
1A1  
1
2
3
4
5
6
7
8
9
48  
47  
46 1A2  
Output Ports Have Equivalent 22-Series  
Resistors, So No External Resistors Are  
Required  
GND  
1A3  
1A4  
45  
44  
43  
42  
Support Mixed-Mode Signal Operation  
(5-V Input and Output Voltages With  
V
CC  
V
CC  
2Y1  
2Y2  
GND 10  
2Y3  
2Y4  
3Y1  
41 2A1  
40 2A2  
39 GND  
3.3-V VCC  
)
Support Unregulated Battery Operation Down  
to 2.7 V  
2A3  
2A4  
3A1  
11  
12  
13  
38  
37  
36  
Typical VOLP (Output Ground Bounce) <0.8 V  
at VCC = 3.3 V, TA = 25°C  
3Y2 14  
GND 15  
3Y3 16  
3Y4 17  
35 3A2  
34 GND  
33 3A3  
32 3A4  
Ioff and Power-Up 3-State Support Hot  
Insertion  
Bus Hold on Data Inputs Eliminates the Need  
for External Pullup/Pulldown Resistors  
V
CC  
V
CC  
18  
31  
Distributed VCC and GND Pin Configuration  
Minimizes High-Speed Switching Noise  
4Y1 19  
4Y2 20  
GND 21  
4Y3 22  
4Y4 23  
4OE 24  
30 4A1  
29 4A2  
28 GND  
27 4A3  
26 4A4  
25 3OE  
Flow-Through Architecture Optimizes PCB  
Layout  
Latch-Up Performance Exceeds 250 mA Per  
JESD 17  
ESD Protection Exceeds 2000 V Per  
MIL-STD-883, Method 3015; Exceeds 200 V  
Using Machine Model (C = 200 pF, R = 0)  
Package Options Include Plastic Shrink  
Small-Outline (DL) and Thin Shrink  
Small-Outline (DGG) Packages and 380-mil  
Fine-Pitch Ceramic Flat (WD) Package Using  
25-mil Center-to-Center Spacings  
DESCRIPTION/ORDERING INFORMATION  
The 'LVTH162240 devices are 16-bit buffers/drivers designed specifically for low-voltage (3.3-V) VCC operation  
and to improve both the performance and density of 3-state memory address drivers, clock drivers, and  
bus-oriented receivers and transmitters. They have the capability to provide a TTL interface to a 5-V system  
environment.  
These devices can be used as four 4-bit buffers, two 8-bit buffers, or one 16-bit buffer and provide inverting  
outputs and symmetrical active-low output-enable (OE) inputs.  
The outputs, which are designed to source or sink up to 12 mA, include equivalent 22-series resistors to  
reduce overshoot and undershoot.  
When VCC is between 0 and 1.5 V, the devices are in the high-impedance state during power up or power down.  
However, to ensure the high-impedance state above 1.5 V, OE should be tied to VCC through a pullup resistor;  
the minimum value of the resistor is determined by the current-sinking capability of the driver.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Widebus is a trademark of Texas Instruments.  
UNLESS OTHERWISE NOTED this document contains  
Copyright © 1997–2006, Texas Instruments Incorporated  
PRODUCTION DATA information current as of publication date.  
Products conform to specifications per the terms of Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  

74LVTH162240DLG4 替代型号

型号 品牌 替代类型 描述 数据表
SN74LVTH162240DLR TI

完全替代

3.3-V ABT 16-BIT BUFFERS/DRIVERS WITH 3-STATE OUTPUTS
74LVTH162240DLRG4 TI

完全替代

3.3-V ABT 16-BIT BUFFERS/DRIVERS WITH 3-STATE OUTPUTS
SN74LVTH162240DL TI

完全替代

3.3-V ABT 16-BIT BUFFERS/DRIVERS WITH 3-STATE OUTPUTS

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