74LVT573

更新时间： 2024-11-25 22:56:23

品牌	Logo	应用领域
飞兆/仙童 - FAIRCHILD		锁存器
页数	文件大小	规格书
8页	109K
描述
Low Voltage Octal Transparent Latch with 3-STATE Outputs

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中文翻译

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数据手册

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74LVT573 数据手册

March 1999

Revised March 2005

74LVT573 • 74LVTH573

Low Voltage Octal Transparent Latch

with 3-STATE Outputs

General Description

Features

■ Input and output interface capability to systems at

The LVT573 and LVTH573 consist of eight latches with

3-STATE outputs for bus organized system applications.

The latches appear transparent to the data when Latch

Enable (LE) is HIGH. When LE is low, the data satisfying

the input timing requirements is latched. Data appears on

the bus when the Output Enable (OE) is LOW. When OE is

HIGH, the bus output is in the high impedance state.

5V V_CC

■ Bushold data inputs eliminate the need for external

pull-up resistors to hold unused inputs (74LVTH573),

also available without bushold feature (74LVT573)

■ Live insertion/extraction permitted

■ Power Up/Down high impedance provides glitch-free

bus loading

The LVTH573 data inputs include bushold, eliminating the

need for external pull-up resistors to hold unused inputs.

■ Outputs source/sink 32 mA/ 64 mA

■ Functionally compatible with the 74 series 573

■ Latch-up performance exceeds 500 mA

■ ESD performance:

These octal latches are designed for low-voltage (3.3V)

V_CCapplications, but with the capability to provide a TTL

interface to a 5V environment. The LVT573 and LVTH573

are fabricated with an advanced BiCMOS technology to

achieve high speed operation similar to 5V ABT while

maintaining a low power dissipation.

Human-body model 2000V

Machine model 200V

Charged-device model 1000V

Ordering Code:

Package

Order Number

Package Description

Number

74LVT573WM

74LVT573SJ

M20B

M20D

20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide

Pb-Free 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide

20-Lead Shrink Small Outline Package (SSOP), JEDEC MO-150, 5.3mm Wide

20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide

74LVT573MSA

74LVT573MTC

MSA20

MTC20

74LVT573MTCX_NL

(Note 1)

Pb-Free 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm

Wide

74LVTH573WM

74LVTH573SJ

M20B

M20D

20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide

Pb-Free 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide

20-Lead Shrink Small Outline Package (SSOP), JEDEC MO-150, 5.3mm Wide

20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide

74LVTH573MSA

74LVTH573MTC

MSA20

MTC20

74LVTH573MTCX_NL

(Note 1)

Pb-Free 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm

Wide

Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.

Pb-Free package per JEDEC J-STD-020B.

Note 1: “_NL” indicates Pb-Free package (per JEDEC J-STD-020B). Device available in Tape and Reel only.

DS012450

www.fairchildsemi.com

12 3 4 5 6 7 8

中文翻译

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与74LVT573相关器件

型号	品牌	获取价格	描述	数据表
74LVT573BQ	NXP	获取价格	3.3 V octal D-type transparent latch; (3-state)
74LVT573BQ	NEXPERIA	获取价格	3.3 V octal D-type transparent latch; 3-stateProduction
74LVT573D	NXP	获取价格	3.3V Octal D-type transparent latch 3-State
74LVT573D	NEXPERIA	获取价格	3.3 V octal D-type transparent latch; 3-stateProduction
74LVT573DB	NXP	获取价格	3.3V Octal D-type transparent latch 3-State
74LVT573DB,118	NXP	获取价格	74LVT573 - 3.3 V octal D-type transparent latch; 3-state SSOP2 20-Pin
74LVT573DB-T	ETC	获取价格	8-Bit D-Type Latch
74LVT573D-T	ETC	获取价格	8-Bit D-Type Latch
74LVT573MSA	FAIRCHILD	获取价格	Low Voltage Octal Transparent Latch with 3-STATE Outputs
74LVT573MSA	ROCHESTER	获取价格	LVT SERIES, 8-BIT DRIVER, TRUE OUTPUT, PDSO20, 5.30 MM, MO-150, SSOP-20

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