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74LVT16646ADGG PDF预览

74LVT16646ADGG

更新时间: 2024-11-17 22:56:23
品牌 Logo 应用领域
恩智浦 - NXP 总线收发器
页数 文件大小 规格书
21页 112K
描述
3.3V ABT 16-bit bus transceiver 3-State

74LVT16646ADGG 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:TransferredReach Compliance Code:compliant
HTS代码:8542.39.00.01风险等级:5.17
其他特性:DIRECTION CONTROL; SELECT INPUT FOR MULTIPLEXED TRANSMISSION OF REGISTERED OR REAL TIME DATA控制类型:INDEPENDENT CONTROL
计数方向:BIDIRECTIONAL系列:LVT
JESD-30 代码:R-PDSO-G56长度:14 mm
逻辑集成电路类型:REGISTERED BUS TRANSCEIVER最大I(ol):0.032 A
湿度敏感等级:1位数:8
功能数量:2端口数量:2
端子数量:56最高工作温度:85 °C
最低工作温度:-40 °C输出特性:3-STATE
输出极性:TRUE封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装等效代码:TSSOP56,.3,20
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
峰值回流温度(摄氏度):260电源:3.3 V
Prop。Delay @ Nom-Sup:3.7 ns传播延迟(tpd):5.2 ns
认证状态:Not Qualified座面最大高度:1.2 mm
子类别:Bus Driver/Transceivers最大供电电压 (Vsup):3.6 V
最小供电电压 (Vsup):2.7 V标称供电电压 (Vsup):3.3 V
表面贴装:YES技术:BICMOS
温度等级:INDUSTRIAL端子面层:NICKEL/PALLADIUM/GOLD (NI/PD/AU)
端子形式:GULL WING端子节距:0.5 mm
端子位置:DUAL处于峰值回流温度下的最长时间:30
翻译:N/A触发器类型:POSITIVE EDGE
宽度:6.1 mmBase Number Matches:1

74LVT16646ADGG 数据手册

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74LVT16646A  
3.3 V 16-bit bus transceiver; 3-state  
Rev. 03 — 12 January 2005  
Product data sheet  
1. General description  
The 74LVT16646A is a high-performance BiCMOS product designed for VCC operation at  
3.3 V. This device is a 16-bit transceiver featuring non-inverting 3-state bus compatible  
outputs in both send and receive directions. The control function implementation  
minimizes external timing requirements. The device features an output enable (OE) input  
for easy cascading and a direction (DIR) input for direction control.  
Data on bus A or bus B is clocked into the registers on the LOW-to-HIGH transition of the  
appropriate clock (CPAB or CPBA). The select control (SAB and SBA) inputs can  
multiplex stored and real-time (transparent mode data).  
2. Features  
16-bit universal bus interface  
3-state buffers  
Output capability: from +64 mA to 32 mA  
TTL input and output switching levels  
Input and output interface capability to systems at 5 V supply  
Bus-hold data inputs eliminate the need for external pull-up resistors to hold unused  
inputs  
Live insertion and extraction permitted  
No bus-current loading when output is tied to 5 V bus  
Power-up reset  
Power-up 3-state  
Latch-up protection exceeds 500 mA per JESD78  
ESD protection:  
MIL STD 883 Method 3 015: exceeds 2000 V  
Machine model: exceeds 200 V  

74LVT16646ADGG 替代型号

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