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74LVT16244BEV PDF预览

74LVT16244BEV

更新时间: 2024-11-17 04:47:55
品牌 Logo 应用领域
恩智浦 - NXP 总线驱动器总线收发器逻辑集成电路信息通信管理
页数 文件大小 规格书
16页 98K
描述
3.3 V 16-bit buffer/driver; 3-state

74LVT16244BEV 技术参数

是否Rohs认证: 不符合生命周期:Transferred
零件包装代码:BGA包装说明:4.50 X 7 MM, 0.65 MM PITCH, PLASTIC, MO-225, SOT702-1, VFBGA-56
针数:56Reach Compliance Code:not_compliant
HTS代码:8542.39.00.01风险等级:5.17
Is Samacsys:N系列:LVT
JESD-30 代码:R-PBGA-B56JESD-609代码:e0
长度:7 mm逻辑集成电路类型:BUS DRIVER
湿度敏感等级:2位数:4
功能数量:4端口数量:2
端子数量:56最高工作温度:85 °C
最低工作温度:-40 °C输出特性:3-STATE
输出极性:TRUE封装主体材料:PLASTIC/EPOXY
封装代码:VFBGA封装形状:RECTANGULAR
封装形式:GRID ARRAY, VERY THIN PROFILE, FINE PITCH峰值回流温度(摄氏度):240
传播延迟(tpd):4 ns认证状态:Not Qualified
座面最大高度:1 mm最大供电电压 (Vsup):3.6 V
最小供电电压 (Vsup):2.7 V标称供电电压 (Vsup):3.3 V
表面贴装:YES技术:BICMOS
温度等级:INDUSTRIAL端子面层:Tin/Lead (Sn63Pb37)
端子形式:BALL端子节距:0.65 mm
端子位置:BOTTOM处于峰值回流温度下的最长时间:20
宽度:4.5 mmBase Number Matches:1

74LVT16244BEV 数据手册

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74LVT16244B; 74LVTH16244B  
3.3 V 16-bit buffer/driver; 3-state  
Rev. 05 — 21 March 2006  
Product data sheet  
1. General description  
The 74LVT16244B; 74LVTH16244B is a high-performance BiCMOS product designed for  
VCC operation at 3.3 V.  
This device is a 16-bit buffer and line driver featuring non-inverting 3-state bus outputs.  
The device can be used as four 4-bit buffers, two 8-bit buffers, or one 16-bit buffer.  
2. Features  
I 16-bit bus interface  
I 3-state buffers  
I Output capability: +64 mA and 32 mA  
I TTL input and output switching levels  
I Input and output interface capability to systems at 5 V supply  
I Bus hold data inputs eliminate need for external pull-up resistors to hold unused inputs  
I Power-up 3-state  
I Live insertion and extraction permitted  
I No bus current loading when output is tied to 5 V bus  
I Latch-up protection:  
N JESD78: exceeds 500 mA  
I ESD protection:  
N MIL STD 833 method 3015: exceeds 2000 V  
N Machine model: exceeds 200 V  
3. Quick reference data  
Table 1.  
Quick reference data  
GND = 0 V; Tamb = 25 °C.  
Symbol Parameter  
Conditions  
Min  
Typ  
Max Unit  
tPLH  
LOW-to-HIGH propagation CL = 50 pF; VCC = 3.3 V  
delay nAn to nYn  
-
1.8  
-
ns  
tPHL  
HIGH-to-LOW propagation CL = 50 pF; VCC = 3.3 V  
delay nAn to nYn  
-
1.7  
-
ns  
Ci  
input capacitance  
output capacitance  
VI = 0 V or 3.0 V  
-
-
3
9
-
-
pF  
pF  
Co  
outputs disabled;  
VO = 0 V or 3.0 V  
ICC  
quiescent supply current  
outputs disabled;  
-
70  
-
µA  
VCC = 3.6 V; IO = 0 A;  
VI = GND or VCC  

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