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74LVQ374 PDF预览

74LVQ374

更新时间: 2024-11-17 22:53:19
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 触发器
页数 文件大小 规格书
6页 107K
描述
Low Voltage Octal D-Type Flip-Flop with 3-STATE Outputs

74LVQ374 数据手册

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May 1998  
74LVQ374  
Low Voltage Octal D-Type Flip-Flop with 3-STATE  
Outputs  
General Description  
Features  
n Ideal for low power/low noise 3.3V applications  
n Implements patented EMI reduction circuitry  
The LVQ374 is a high-speed, low-power octal D-type flip-flop  
featuring separate D-type inputs for each flip-flop and  
3-STATE outputs for bus-oriented applications. A buffered  
Clock (CP) and Output Enable (OE) are common to all  
flip-flops.  
n Available in SOIC JEDEC, SOIC EIAJ and QSOP  
packages  
n Guaranteed simultaneous switching noise level and  
dynamic threshold performance  
n Improved latch-up immunity  
n Guaranteed incident wave switching into 75  
n 4 kV minimum ESD immunity  
n Buffered positive edge-triggered clock  
n 3-STATE outputs drive bus lines or buffer memory  
address registers  
Ordering Code:  
Order Number  
74LVQ374SC  
74LVQ374SJ  
Package Number  
M20B  
Package Description  
20-Lead (0.300" Wide) Molded Small Outline Package, SOIC JEDEC  
20-Lead Molded Shrink Small Outline Package, SOIC EIAJ  
20-Lead (0.150" Wide) Molded Shrink Small Outline Package, SOIC JEDEC  
M20D  
74LVQ374QSC  
MQA20  
Devices also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.  
Logic Symbols  
Connection Diagram  
Pin Assignment for  
SOIC and QSOP  
DS011360-1  
IEEE/IEC  
DS011360-3  
DS011360-2  
© 1998 Fairchild Semiconductor Corporation  
DS011360  
www.fairchildsemi.com  

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