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74LVQ157SC PDF预览

74LVQ157SC

更新时间: 2024-11-20 04:47:51
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS 解复用器逻辑集成电路光电二极管
页数 文件大小 规格书
12页 301K
描述
Low Voltage Quad 2-Input Multiplexer

74LVQ157SC 数据手册

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74LVQ157  
LOW VOLTAGE QUAD 2 CHANNEL MULTIPLEXER  
HIGH SPEED:  
= 7 ns (TYP.) at V = 3.3 V  
t
PD  
CC  
COMPATIBLE WITH TTL OUTPUTS  
LOW POWER DISSIPATION:  
I
= 4 µA (MAX.) at T =25°C  
CC  
A
LOW NOISE:  
= 0.2V (TYP.) at V = 3.3V  
75TRANSMISSION LINE OUTPUT DRIVE  
CAPABILITY  
SOP  
TSSOP  
V
OLP  
CC  
Table 1: Order Codes  
PACKAGE  
SYMMETRICAL OUTPUT IMPEDANCE:  
|I | = I = 12mA (MIN) at V = 3.0 V  
OH  
OL  
CC  
T & R  
PCI BUS LEVELS GUARANTEED AT 24 mA  
BALANCED PROPAGATION DELAYS:  
SOP  
74LVQ157MTR  
74LVQ157TTR  
TSSOP  
t
t
PLH  
PHL  
OPERATING VOLTAGE RANGE:  
(OPR) = 2V to 3.6V (1.2V Data Retention)  
PIN AND FUNCTION COMPATIBLE WITH  
74 SERIES 157  
V
It consists of four 2-input digital multiplexers with  
common select and strobe inputs. When STROBE  
input is held high selection of data is inhibit and all  
the outputs become low. The SELECT decoding  
determines whether the A or B inputs get routed to  
their corresponding Y outputs.  
CC  
IMPROVED LATCH-UP IMMUNITY  
DESCRIPTION  
All inputs and outputs are equipped with  
protection circuits against static discharge, giving  
them 2KV ESD immunity and transient excess  
voltage.  
The 74LVQ157 is a low voltage CMOS QUAD  
2-CHANNEL MULTIPLEXER fabricated with  
sub-micron silicon gate and double-layer metal  
2
wiring C MOS technology. It is ideal for low power  
and low noise 3.3V applications.  
Figure 1: Pin Connection And IEC Logic Symbols  
Rev. 5  
1/12  
July 2004  

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