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74LVQ125SJX PDF预览

74LVQ125SJX

更新时间: 2024-11-19 23:24:27
品牌 Logo 应用领域
其他 - ETC 驱动器逻辑集成电路光电二极管
页数 文件大小 规格书
5页 55K
描述
4-Bit Buffer/Driver

74LVQ125SJX 数据手册

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February 1992  
Revised June 2001  
74LVQ125  
Low Voltage Quad Buffer with 3-STATE Outputs  
General Description  
Features  
Ideal for low power/low noise 3.3V applications  
Guaranteed simultaneous switching noise level and  
dynamic threshold performance  
The LVQ125 contains four independent non-inverting buff-  
ers with 3-STATE outputs.  
Guaranteed pin-to-pin skew AC performance  
Guaranteed incident wave switching into 75  
Ordering Code:  
Order Number  
74LVQ125SC  
74LVQ125SJ  
Package Number  
M14A  
Package Description  
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow  
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide  
M14D  
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.  
Logic Symbol  
Connection Diagram  
IEEE/IEC  
Truth Table  
Pin Descriptions  
Inputs  
Output  
On  
Pin Names  
Description  
An  
Bn  
An, Bn  
On  
Inputs  
L
L
L
H
X
L
H
Z
Outputs  
H
H = HIGH Voltage Level  
L = LOW Voltage Level  
Z = HIGH Impedance  
X = Immaterial  
© 2001 Fairchild Semiconductor Corporation  
DS011349  
www.fairchildsemi.com  

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