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74LVQ02 PDF预览

74LVQ02

更新时间: 2024-11-18 22:15:31
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS 输入元件
页数 文件大小 规格书
8页 59K
描述
QUAD 2-INPUT NOR GATE

74LVQ02 数据手册

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74LVQ02  
QUAD 2-INPUT NOR GATE  
HIGH SPEED:tPD =5 ns (TYP.) atVCC =3.3V  
COMPATIBLEWITH TTL OUTPUTS  
LOW POWER DISSIPATION:  
I
CC =2 µA (MAX.) at TA =25 oC  
LOWNOISE:  
VOLP =0.3 V (TYP.)at VCC = 3.3V  
M
T
(Micro Package)  
(TSSOPPackage)  
75 TRANSMISSIONLINEDRIVING  
ORDER CODES :  
CAPABILITY  
SYMMETRICAL OUTPUT IMPEDANCE:  
74LVQ02M  
74LVQ02T  
|IOH| = IOL = 12 mA (MIN)  
technology.It is ideal for low power and low noise  
3.3V applications.  
The internal circuit is composed of 3 stages  
including buffer output, which enables high noise  
immunity and stable output.  
It has better speed performance at 3.3V than 5V  
LS-TTL family combined with the true CMOS low  
power consumption.  
PCI BUSLEVELSGUARANTEED AT 24mA  
BALANCEDPROPAGATIONDELAYS:  
tPLH tPHL  
OPERATING VOLTAGERANGE:  
VCC (OPR)= 2V to 3.6V(1.2VDataRetention)  
PIN AND FUNCTION COMPATIBLEWITH  
74 SERIES02  
IMPROVED LATCH-UP IMMUNITY  
All inputs and outputs are equipped with  
protection circuits against static discharge, giving  
them 2KV ESD immunity and transient excess  
voltage.  
DESCRIPTION  
The LVQ02 is a low voltage CMOS QUAD  
2-INPUT NOR GATE fabricated with sub-micron  
silicon gate and double-layermetal wiring C2MOS  
PIN CONNECTION AND IEC LOGIC SYMBOLS  
1/8  
February 1999  

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