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74LVCZ161284ATTR PDF预览

74LVCZ161284ATTR

更新时间: 2024-11-22 21:54:51
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS 驱动器接口集成电路光电二极管
页数 文件大小 规格书
12页 442K
描述
LOW VOLTAGE HIGH SPEED IEEE 1284 TRANSCEIVER WITH ERROR-FREE POWER-UP

74LVCZ161284ATTR 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active零件包装代码:TSSOP
包装说明:TSSOP-48针数:48
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.52
Is Samacsys:N差分输出:NO
驱动器位数:12输入特性:SCHMITT TRIGGER
接口集成电路类型:LINE TRANSCEIVER接口标准:GENERAL PURPOSE
JESD-30 代码:R-PDSO-G48JESD-609代码:e4
长度:12.5 mm功能数量:1
端子数量:48最高工作温度:85 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH峰值回流温度(摄氏度):NOT SPECIFIED
认证状态:Not Qualified最大接收延迟:9 ns
接收器位数:13座面最大高度:1.2 mm
最大供电电压:3.6 V最小供电电压:3 V
标称供电电压:3.3 V电源电压1-最大:5.5 V
电源电压1-分钟:3 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)端子形式:GULL WING
端子节距:0.5 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED最大传输延迟:9 ns
宽度:6.1 mmBase Number Matches:1

74LVCZ161284ATTR 数据手册

 浏览型号74LVCZ161284ATTR的Datasheet PDF文件第2页浏览型号74LVCZ161284ATTR的Datasheet PDF文件第3页浏览型号74LVCZ161284ATTR的Datasheet PDF文件第4页浏览型号74LVCZ161284ATTR的Datasheet PDF文件第5页浏览型号74LVCZ161284ATTR的Datasheet PDF文件第6页浏览型号74LVCZ161284ATTR的Datasheet PDF文件第7页 
74LVCZ161284A  
LOW VOLTAGE HIGH SPEED IEEE1284 TRANSCEIVER  
WITH ERROR-FREE POWER-UP  
I
I
HIGH SPEED: t = 9ns (MAX.) at V = 3V  
PD CC  
LOW POWER DISSIPATION:  
I
=20µA (MAX) at V =3.6V T =85°C  
CC  
CC A  
I
I
I
I
I
I
TTL COMPATIBLE INPUTS  
V =2V (MIN) V =0.8(MAX)  
IH  
IL  
OPERATING VOLTAGE RANGE:  
(OPR) = 3.0V to 3.6V  
TSSOP  
TUBE  
V
CC  
A PORT HAVE STANDARD 4mA TOTEM  
POLE OUTPUT  
B PORT HIGH DRIVE SOURCE/SINK  
CAPABILITY OF 14mA  
AUTO POWER-UP FEATURE TO PREVENT  
PRINTER ERRORS  
SUPPORT IEEE STD 1284-I (LEVEL 1 TYPE)  
AND IEEE STD 1284-II (LEVEL 2 TYPE) FOR  
BIDIRECTIONAL PARALLEL  
ORDER CODES  
PACKAGE  
T & R  
TSSOP  
74LVCZ161284ATTR  
PIN CONNECTION  
COMMUNICATIONS BETWEEN PERSONAL  
COMPUTER ANT PRINTING PERIPHERALS  
TRANSLATION CAPABILITY ALLOW  
OUTPUTS ON CABLE SIDE TO INTERFACE  
WITH 5V SIGNAL  
PULL-UP RESISTOR INTEGRATED ON ALL  
OPEN-DRAIN OUTPUT ELIMINATE THE  
NEED FOR DISCRETE RESISTOR  
REPLACE THE FUNCTION OF TWO  
74LVC1284 DEVICES  
I
I
I
DESCRIPTION  
The 74LVCZ161284A contains eight high speed  
non inverting bidirectional buffers and eleven  
control/status non-inverting buffers with open  
2
drain outputs fabricated in silicon gate C MOS  
technology. It’s intended to provide a standard  
signaling method for  
a bi-direction parallel  
peripheral in an Extended Capabilities Port Mode  
(ECP). The HD (Active HIGH) input pin enables  
the Cable port to switch from Open Drain to a high  
drive totem pole output, capable of sourcing 14mA  
on all thirteen buffer and 84mA on PERI LOGIC  
OUTPUT buffer. The DIR input determines the  
direction of data flow on the bidirectional buffers.  
DIR (Active HIGH) enables data flow from A port  
to B port. DIR (Active LOW) enables data flow  
from B port to A port. The Y output (Y9-Y13) stay  
in the high state after power-on until an associated  
input A9-A13) goes high. When an associated  
input goes high, all Y outputs are active, and non  
July 2005  
1/12  

74LVCZ161284ATTR 替代型号

型号 品牌 替代类型 描述 数据表
74LVC161284TTR STMICROELECTRONICS

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