Datasheet > 74LVC2G240GS

74LVC2G240GS

更新时间： 2023-09-03 20:27:33

品牌	Logo	应用领域
安世 - NEXPERIA		/
页数	文件大小	规格书
17页	279K
描述
Dual inverting buffer/line driver; 3-stateProduction

阅读下载

中文翻译

获取价格

数据手册

如果您发现信息不准确，欢迎纠错

74LVC2G240GS 数据手册

74LVC2G240

Dual inverting buffer/line driver; 3-state

Rev. 12 — 1 June 2023

Product data sheet

1. General description

The 74LVC2G240 is a dual inverting buffer/line driver with 3-state outputs. The 3-state outputs are

controlled by the output enable inputs 1OE and 2OE. A HIGH level at pins nOE causes the outputs

to assume a high-impedance OFF-state. Schmitt trigger action at all inputs makes the circuit highly

tolerant of slower input rise and fall times.

Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of the

74LVC2G240 as a translator in a mixed 3.3 V and 5 V environment.

It is fully specified for partial power-down applications using I_OFF. The I_OFFcircuitry disables the

output, preventing a damaging backflow current through the device when it is powered down.

2. Features and benefits

•

Wide supply voltage range from 1.65 V to 5.5 V

•

5 V tolerant input/output for interfacing with 5 V logic

High noise immunity

Complies with JEDEC standard:

•

JESD8-7 (1.65 V to 1.95 V)

JESD8-5 (2.3 V to 2.7 V)

JESD8-B/JESD36 (2.7 V to 3.6 V)

•

ESD protection:

•

HBM JESD22-A114F exceeds 2000 V

MM JESD22-A115-A exceeds 200 V

•

±24 mA output drive (V_CC= 3.0 V)

CMOS low power consumption

Latch-up performance exceeds 250 mA

Direct interface with TTL levels

Inputs accept voltages up to 5 V

Multiple package options

Specified from -40 °C to +85 °C and -40 °C to +125 °C

12 3 4 5 6 7...17

中文翻译

下载PDF

与74LVC2G240GS相关器件

型号	品牌	获取价格	描述	数据表
74LVC2G240GT	NXP	获取价格	Dual inverting buffer/line driver; 3-state
74LVC2G240GT	NEXPERIA	获取价格	Dual inverting buffer/line driver; 3-stateProduction
74LVC2G240GT,115	NXP	获取价格	74LVC2G240 - Dual inverting buffer/line driver; 3-state SON 8-Pin
74LVC2G240GT-G	NXP	获取价格	IC LVC/LCX/Z SERIES, DUAL 1-BIT DRIVER, INVERTED OUTPUT, PDSO8, 1 X 1.95 MM, 0.50 MM HEIGH
74LVC2G240-Q100	NEXPERIA	获取价格	Dual inverting buffer/line driver; 3-state
74LVC2G241	NXP	获取价格	Dual buffer/line driver with 5 V tolerant inputs/outputs; 3-state
74LVC2G241_08	NXP	获取价格	Dual buffer/line driver; 3-state
74LVC2G241DC	NXP	获取价格	Dual buffer/line driver with 5 V tolerant inputs/outputs; 3-state
74LVC2G241DC	NEXPERIA	获取价格	Dual buffer/line driver; 3-stateProduction
74LVC2G241DC,125	NXP	获取价格	74LVC2G241 - Dual buffer/line driver; 3-state SSOP 8-Pin