5秒后页面跳转
74LVC257AD,118 PDF预览

74LVC257AD,118

更新时间: 2024-01-03 04:51:17
品牌 Logo 应用领域
恩智浦 - NXP 光电二极管逻辑集成电路
页数 文件大小 规格书
18页 187K
描述
74LVC257A - Quad 2-input multiplexer with 5 V tolerant inputs/outputs; 3-state SOP 16-Pin

74LVC257AD,118 技术参数

是否Rohs认证: 符合生命周期:Active
零件包装代码:SOP包装说明:SOP,
针数:16Reach Compliance Code:compliant
HTS代码:8542.39.00.01风险等级:0.6
系列:LVC/LCX/ZJESD-30 代码:R-PDSO-G16
JESD-609代码:e4长度:9.9 mm
逻辑集成电路类型:MULTIPLEXER湿度敏感等级:1
功能数量:4输入次数:2
输出次数:1端子数量:16
最高工作温度:125 °C最低工作温度:-40 °C
输出特性:3-STATE输出极性:TRUE
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
峰值回流温度(摄氏度):260传播延迟(tpd):7 ns
认证状态:Not Qualified座面最大高度:1.75 mm
最大供电电压 (Vsup):3.6 V最小供电电压 (Vsup):1.2 V
标称供电电压 (Vsup):2.7 V表面贴装:YES
技术:CMOS温度等级:AUTOMOTIVE
端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
处于峰值回流温度下的最长时间:30宽度:3.9 mm
Base Number Matches:1

74LVC257AD,118 数据手册

 浏览型号74LVC257AD,118的Datasheet PDF文件第2页浏览型号74LVC257AD,118的Datasheet PDF文件第3页浏览型号74LVC257AD,118的Datasheet PDF文件第4页浏览型号74LVC257AD,118的Datasheet PDF文件第5页浏览型号74LVC257AD,118的Datasheet PDF文件第6页浏览型号74LVC257AD,118的Datasheet PDF文件第7页 
74LVC257A  
Quad 2-input multiplexer with 5 V tolerant inputs/outputs;  
3-state  
Rev. 6 — 28 November 2011  
Product data sheet  
1. General description  
The 74LVC257A is a quad 2-input multiplexer with 3-state outputs, which select 4 bits of  
data from two sources and are controlled by a common data select input (pin S). The data  
inputs from source 0 (pins 1I0 to 4I0) are selected when pin S is LOW and the data inputs  
from source 1 (pins 1I1 to 4I1) are selected when pin S is HIGH. Data appears at the  
outputs (pins 1Y to 4Y) in true (non-inverting) form from the selected inputs. The device is  
the logic implementation of a 4-pole, 2-position switch, where the position of the switch is  
determined by the logic levels applied to pin S. The outputs are forced to a  
high-impedance OFF-state when pin OE is HIGH.  
Inputs can be driven from either 3.3 V or 5.0 V devices. When disabled, up to 5.5 V can be  
applied to the outputs. These features allow the use of these devices as translators in  
mixed 3.3 V and 5 V applications.  
2. Features and benefits  
5 V tolerant inputs/outputs, for interfacing with 5 V logic  
Wide supply voltage range from 1.2 V to 3.6 V  
CMOS low-power consumption  
Direct interface with TTL levels  
Output drive capability 50 transmission lines at 85 C  
Complies with JEDEC standard:  
JESD8-7A (1.65 V to 1.95 V)  
JESD8-5A (2.3 V to 2.7 V)  
JESD8-C/JESD36 (2.7 V to 3.6 V)  
ESD protection:  
HBM JESD22-A114F exceeds 2000 V  
MM JESD22-A115B exceeds 200 V  
CDM JESD22-C101E exceeds 1000 V  
Specified from 40 C to +85 C and 40 C to +125 C  
 
 

74LVC257AD,118 替代型号

型号 品牌 替代类型 描述 数据表
MC74LCX257DR2G ONSEMI

功能相似

Low-Voltage CMOS Quad 2-Input Multiplexer With 5.0 V−Tolerant Inputs and Outputs (3&

与74LVC257AD,118相关器件

型号 品牌 获取价格 描述 数据表
74LVC257ADB NXP

获取价格

Quad 2-input multiplexer with 5 Volt tolerant inputs/outputs 3-State
74LVC257ADB,112 NXP

获取价格

74LVC257A - Quad 2-input multiplexer with 5 V tolerant inputs/outputs; 3-state SSOP1 16-Pi
74LVC257ADB,118 NXP

获取价格

74LVC257A - Quad 2-input multiplexer with 5 V tolerant inputs/outputs; 3-state SSOP1 16-Pi
74LVC257ADB-T ETC

获取价格

2-Input Digital Multiplexer
74LVC257AD-T NXP

获取价格

IC LVC/LCX/Z SERIES, QUAD 2 LINE TO 1 LINE MULTIPLEXER, TRUE OUTPUT, PDSO16, PLASTIC, SO-1
74LVC257APW NXP

获取价格

Quad 2-input multiplexer with 5 Volt tolerant inputs/outputs 3-State
74LVC257APW NEXPERIA

获取价格

Quad 2-input multiplexer with 5 V tolerant inputs/outputs; 3-stateProduction
74LVC257APW,112 NXP

获取价格

74LVC257A - Quad 2-input multiplexer with 5 V tolerant inputs/outputs; 3-state TSSOP 16-Pi
74LVC257APWDH NXP

获取价格

Quad 2-input multiplexer with 5 Volt tolerant inputs/outputs 3-State
74LVC257APW-Q100 NEXPERIA

获取价格

Quad 2-input multiplexer with 5 V tolerant inputs/outputs; 3-stateProduction