Datasheet > 74LVC1G99GS

74LVC1G99GS

更新时间： 2024-11-28 06:52:47

品牌	Logo	应用领域
恩智浦 - NXP		输入元件光电二极管
页数	文件大小	规格书
32页	336K
描述
LVC/LCX/Z SERIES, 4-INPUT MAJORITY LOGIC GATE, PDSO8, 1.35 X 1 MM, 0.35 MM HEIGHT, SOT-1203, SON-8

阅读下载

中文翻译

获取价格

数据手册

如果您发现信息不准确，欢迎纠错

74LVC1G99GS 数据手册

74LVC1G99

Ultra-configurable multiple function gate; 3-state

Rev. 8 — 5 April 2013

Product data sheet

1. General description

The 74LVC1G99 provides a low voltage, ultra-configurable, multiple function gate with

3-state output. The device can be configured as one of several logic functions including,

AND, OR, NAND, NOR, XOR, XNOR, inverter, buffer and MUX. No external components

are required to configure the device as all inputs can be connected directly to V_CCor

GND. The 3-state output is controlled by the output enable input (OE). A HIGH level at OE

causes the output (Y) to assume a high-impedance OFF-state. When OE is LOW, the

output state is determined by the signals applied to the Schmitt trigger inputs (A, B, C and

D).

Due to the use of Schmitt trigger inputs the device is tolerant of slowly changing input

signals, transforming them into sharply defined, jitter free output signals. By eliminating

leakage current paths to V_CCand GND, the inputs and disabled output are also

over-voltage tolerant, making the device suitable for mixed-voltage applications.

This device is fully specified for partial power-down applications using I_OFF

The I_OFFcircuitry disables the output, preventing the damaging backflow current through

the device when it is powered down.

The 74LVC1G99 is fully specified over the supply range from 1.65 V to 5.5 V.

2. Features and benefits

 Wide supply voltage range from 1.65 V to 5.5 V

 5 V tolerant inputs for interfacing with 5 V logic

 High noise immunity

 Complies with JEDEC standard:

 JESD8-7 (1.65 V to 1.95 V)

 JESD8-5 (2.3 V to 2.7 V)

 JESD8-B/JESD36 (2.7 V to 3.6 V)

 ESD protection:

 HBM JESD22-A114F exceeds 2000 V

 MM JESD22-A115-A exceeds 200 V

 24 mA output drive (V_CC= 3.0 V)

 CMOS low power consumption

 Latch-up performance exceeds 250 mA

 Direct interface with TTL levels

 Inputs accept voltages up to 5 V

 Multiple package options

 Specified from 40 C to +85 C and 40 C to +125 C.

12 3 4 5 6 7...32

中文翻译

下载PDF

与74LVC1G99GS相关器件

型号	品牌	获取价格	描述	数据表
74LVC1G99GT	NXP	获取价格	Ultra-configurable multiple function gate; 3-state
74LVC1G99GT	NEXPERIA	获取价格	Ultra-configurable multiple function gate; 3-stateProduction
74LVC1G99GT,115	NXP	获取价格	74LVC1G99 - Ultra-configurable multiple function gate; 3-state SON 8-Pin
74LVC1G99GT-G	NXP	获取价格	IC LVC/LCX/Z SERIES, 4-INPUT MAJORITY LOGIC GATE, PDSO8, 1 X 1.95 MM, 0.50 MM HEIGHT, 0.50
74LVC1GU04	NXP	获取价格	Inverter
74LVC1GU04DBVRE4	TI	获取价格	SINGLE INVERTER GATE
74LVC1GU04DBVRG4	TI	获取价格	SINGLE INVERTER GATE
74LVC1GU04DBVTE4	TI	获取价格	SINGLE INVERTER GATE
74LVC1GU04DBVTG4	TI	获取价格	SINGLE INVERTER GATE
74LVC1GU04DCKRE4	TI	获取价格	SINGLE INVERTER GATE