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74LVC16T245DGGRG4 PDF预览

74LVC16T245DGGRG4

更新时间: 2024-09-14 05:05:51
品牌 Logo 应用领域
德州仪器 - TI 总线驱动器总线收发器逻辑集成电路光电二极管输出元件
页数 文件大小 规格书
16页 428K
描述
16-BIT DUAL-SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS

74LVC16T245DGGRG4 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active零件包装代码:TSSOP
包装说明:TSSOP-48针数:48
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01Factory Lead Time:8 weeks
风险等级:5.14Is Samacsys:N
其他特性:TWO SEPARATE CONFIGURABLE POWER SUPPLY FOR PORT A AND PORT B控制类型:COMMON CONTROL
计数方向:BIDIRECTIONAL系列:LVC/LCX/Z
JESD-30 代码:R-PDSO-G48JESD-609代码:e4
长度:12.5 mm负载电容(CL):15 pF
逻辑集成电路类型:BUS TRANSCEIVER最大I(ol):0.032 A
湿度敏感等级:1位数:8
功能数量:2端口数量:2
端子数量:48最高工作温度:85 °C
最低工作温度:-40 °C输出特性:3-STATE
输出极性:TRUE封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装等效代码:TSSOP48,.3,20
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
包装方法:TR峰值回流温度(摄氏度):260
电源:1.8/5 V最大电源电流(ICC):0.03 mA
Prop。Delay @ Nom-Sup:23.8 ns传播延迟(tpd):23.8 ns
认证状态:Not Qualified座面最大高度:1.2 mm
子类别:Bus Driver/Transceivers最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):1.65 V标称供电电压 (Vsup):1.8 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式:GULL WING端子节距:0.5 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
翻译:1.8/5V &1.8/5V宽度:6.1 mm
Base Number Matches:1

74LVC16T245DGGRG4 数据手册

 浏览型号74LVC16T245DGGRG4的Datasheet PDF文件第2页浏览型号74LVC16T245DGGRG4的Datasheet PDF文件第3页浏览型号74LVC16T245DGGRG4的Datasheet PDF文件第4页浏览型号74LVC16T245DGGRG4的Datasheet PDF文件第5页浏览型号74LVC16T245DGGRG4的Datasheet PDF文件第6页浏览型号74LVC16T245DGGRG4的Datasheet PDF文件第7页 
SN74LVC16T245  
16-BIT DUAL-SUPPLY BUS TRANSCEIVER  
WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS  
www.ti.com  
SCES636AAUGUST 2005REVISED AUGUST 2005  
FEATURES  
DGG OR DGV PACKAGE  
Control Inputs VIH/VIL Levels Are Referenced  
(TOP VIEW)  
to VCCA Voltage  
1
48  
47  
46  
45  
44  
43  
42  
41  
40  
39  
38  
37  
36  
35  
34  
33  
32  
31  
30  
29  
28  
27  
26  
25  
VCC Isolation Feature – If Either VCC Input Is at  
GND, Both Ports Are in the High-Impedance  
State  
1DIR  
1B1  
1B2  
GND  
1B3  
1B4  
1OE  
1A1  
1A2  
GND  
1A3  
1A4  
2
3
4
Overvoltage-Tolerant Inputs/Outputs Allow  
Mixed-Voltage-Mode Data Communications  
5
6
Fully Configurable Dual-Rail Design Allows  
Each Port to Operate Over the Full 1.65-V to  
5.5-V Power-Supply Range  
7
V
CCB  
V
CCA  
8
1B5  
1B6  
GND  
1B7  
1B8  
2B1  
2B2  
GND  
2B3  
2B4  
1A5  
1A6  
GND  
1A7  
1A8  
2A1  
2A2  
GND  
2A3  
2A4  
9
Ioff Supports Partial-Power-Down Mode  
Operation  
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
Latch-Up Performance Exceeds 100 mA Per  
JESD 78, Class II  
ESD Protection Exceeds JESD 22  
– 2000-V Human-Body Model (A114-A)  
– 200-V Machine Model (A115-A)  
– 1000-V Charged-Device Model (C101)  
V
CCB  
V
CCA  
2B5  
2B6  
GND  
2B7  
2B8  
2DIR  
2A5  
2A6  
GND  
2A7  
2A8  
2OE  
DESCRIPTION/ORDERING INFORMATION  
This 16-bit noninverting bus transceiver uses two  
separate configurable power-supply rails. The A port  
is designed to track VCCA. VCCA accepts any supply  
voltage from 1.65 V to 5.5 V. The B port is designed  
to track VCCB. VCCB accepts any supply voltage from  
1.65 V to 5.5 V. This allows for universal low-voltage  
bidirectional translation between any of the 1.8-V,  
2.5-V, 3.3-V, and 5-V voltage nodes.  
The SN74LVC16T245 is designed for asynchronous communication between two data buses. The logic levels of  
the direction-control (DIR) input and the output-enable (OE) input activate either the B-port outputs or the A-port  
outputs or place both output ports into the high-impedance mode. The device transmits data from the A bus to  
the B bus when the B-port outputs are activated, and from the B bus to the A bus when the A-port outputs are  
activated. The input circuitry on both A and B ports is always active and must have a logic HIGH or LOW level  
applied to prevent excess ICC and ICCZ  
.
The SN74LVC16T245 is designed so that the control pins (1DIR, 2DIR, 1OE, and 2OE) are supplied by VCCA  
.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs,  
preventing damaging current backflow through the device when it is powered down.  
ORDERING INFORMATION  
TA  
PACKAGE(1)  
ORDERABLE PART NUMBER  
SN74LVC16T245DGGR  
SN74LVC16T245DGVR  
SN74LVC16T245GQLR  
SN74LVC16T245ZQLR  
TOP-SIDE MARKING  
LVC16T245  
TSSOP – DGG  
TVSOP – DGV  
VFBGA – GQL  
Tape and reel  
Tape and reel  
Tape and reel  
Tape and reel  
LDT245  
LDT245  
PREVIEW  
–40°C to 85°C  
VFBGA – ZQL (Pb-free)  
(1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at  
www.ti.com/sc/package.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
PRODUCTION DATA information is current as of publication date.  
Copyright © 2005, Texas Instruments Incorporated  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  

74LVC16T245DGGRG4 替代型号

型号 品牌 替代类型 描述 数据表
SN74LVCH16T245DLR TI

完全替代

16-BIT DUAL-SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPU
74LVCH16T245DLG4 TI

完全替代

16-BIT DUAL-SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPU
SN74LVC16T245DGGR TI

完全替代

16 BIT DUAL SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3 STATE OUTPU

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