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74LVC14AD,112 PDF预览

74LVC14AD,112

更新时间: 2024-09-23 14:47:07
品牌 Logo 应用领域
恩智浦 - NXP PC光电二极管逻辑集成电路
页数 文件大小 规格书
18页 134K
描述
74LVC14A - Hex inverting Schmitt trigger with 5 V tolerant input SOIC 14-Pin

74LVC14AD,112 技术参数

是否Rohs认证: 符合生命周期:Transferred
零件包装代码:SOIC包装说明:SOP, SOP14,.25
针数:14Reach Compliance Code:compliant
HTS代码:8542.39.00.01风险等级:7.43
系列:LVC/LCX/ZJESD-30 代码:R-PDSO-G14
JESD-609代码:e4长度:8.65 mm
负载电容(CL):50 pF逻辑集成电路类型:INVERTER
湿度敏感等级:1功能数量:6
输入次数:1端子数量:14
最高工作温度:125 °C最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装等效代码:SOP14,.25封装形状:RECTANGULAR
封装形式:SMALL OUTLINE包装方法:TUBE
峰值回流温度(摄氏度):260电源:3.3 V
Prop。Delay @ Nom-Sup:8 ns传播延迟(tpd):10 ns
认证状态:Not Qualified施密特触发器:YES
座面最大高度:1.75 mm子类别:Gates
最大供电电压 (Vsup):3.6 V最小供电电压 (Vsup):1.2 V
标称供电电压 (Vsup):2.7 V表面贴装:YES
技术:CMOS温度等级:AUTOMOTIVE
端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
处于峰值回流温度下的最长时间:30宽度:3.9 mm
Base Number Matches:1

74LVC14AD,112 数据手册

 浏览型号74LVC14AD,112的Datasheet PDF文件第2页浏览型号74LVC14AD,112的Datasheet PDF文件第3页浏览型号74LVC14AD,112的Datasheet PDF文件第4页浏览型号74LVC14AD,112的Datasheet PDF文件第5页浏览型号74LVC14AD,112的Datasheet PDF文件第6页浏览型号74LVC14AD,112的Datasheet PDF文件第7页 
74LVC14A  
Hex inverting Schmitt trigger with 5 V tolerant input  
Rev. 5 — 23 December 2011  
Product data sheet  
1. General description  
The 74LVC14A provides six inverting buffers with Schmitt trigger input. It is capable of  
transforming slowly-changing input signals into sharply defined, jitter-free output signals.  
The inputs switch at different points for positive and negative-going signals. The difference  
between the positive voltage VT+ and the negative voltage VTis defined as the input  
hysteresis voltage VH.  
Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of this  
device as a translator in mixed 3.3 V and 5 V applications.  
2. Features and benefits  
Wide supply voltage range from 1.2 V to 3.6 V  
5 V tolerant input for interfacing with 5 V logic  
CMOS low-power consumption  
Direct interface with TTL levels  
Unlimited input rise and fall times  
Inputs accept voltages up to 5.5 V  
Complies with JEDEC standard JESD8-C/JESD36 (2.7 V to 3.6 V)  
ESD protection:  
HBM JESD22-A114F exceeds 2000 V  
MM JESD22-A115-B exceeds 200 V  
CDM JESD22-C101E exceeds 1000 V  
Multiple package options  
Specified from 40 C to +85 C and from 40 C to +125 C  
3. Applications  
Wave and pulse shapers for highly noisy environments  
Astable multivibrators  
Monostable multivibrators  
 
 
 

74LVC14AD,112 替代型号

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