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74LVC138APW-Q100 PDF预览

74LVC138APW-Q100

更新时间: 2024-09-24 02:56:59
品牌 Logo 应用领域
安世 - NEXPERIA 驱动光电二极管逻辑集成电路
页数 文件大小 规格书
14页 245K
描述
3-to-8 line decoder/demultiplexer; inverting

74LVC138APW-Q100 技术参数

是否Rohs认证: 符合生命周期:Active
包装说明:TSSOP,Reach Compliance Code:compliant
ECCN代码:EAR99HTS代码:8542.39.00.01
风险等级:5.57系列:LVC/LCX/Z
输入调节:STANDARDJESD-30 代码:R-PDSO-G16
长度:5 mm逻辑集成电路类型:OTHER DECODER/DRIVER
功能数量:1端子数量:16
最高工作温度:125 °C最低工作温度:-40 °C
输出极性:INVERTED封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH峰值回流温度(摄氏度):NOT SPECIFIED
传播延迟(tpd):12.7 ns筛选级别:AEC-Q100
座面最大高度:1.1 mm最大供电电压 (Vsup):3.6 V
最小供电电压 (Vsup):1.65 V标称供电电压 (Vsup):1.8 V
表面贴装:YES技术:CMOS
温度等级:AUTOMOTIVE端子形式:GULL WING
端子节距:0.65 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:4.4 mm
Base Number Matches:1

74LVC138APW-Q100 数据手册

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74LVC138A-Q100  
3-to-8 line decoder/demultiplexer; inverting  
Rev. 2 — 23 January 2019  
Product data sheet  
1. General description  
The 74LVC138A-Q100 is a 3-to-8 line decoder/demultiplexer. It accepts three binary weighted  
address inputs (A0, A1 and A2). When the inputs are enabled, it provides eight mutually exclusive  
outputs (Y0 to Y7) that are LOW when selected.  
There are three enable inputs: two active LOW (E1 and E2) and one active HIGH (E3). Every  
output is HIGH unless E1 and E2 are LOW and E3 is HIGH.  
This multiple enable function allows easy parallel expansion of the device to a 1-of-32  
(5 lines to 32 lines) decoder with just four 74LVC138A-Q100 devices and one inverter. The  
74LVC138A-Q100 can be used as an eight output demultiplexer by using one of the active LOW  
enable inputs as the data input and the remaining enable inputs as strobes. Unused enable inputs  
must be permanently tied to their appropriate active HIGH or LOW state.  
This product has been qualified to the Automotive Electronics Council (AEC) standard Q100  
(Grade 1) and is suitable for use in automotive applications.  
2. Features and benefits  
Automotive product qualification in accordance with AEC-Q100 (Grade 1)  
Specified from -40 °C to +85 °C and from -40 °C to +125 °C  
5 V tolerant inputs for interfacing with 5 V logic  
Wide supply voltage range from 1.2 V to 3.6 V  
CMOS low power consumption  
Direct interface with TTL levels  
Demultiplexing capability  
Multiple input enable for easy expansion  
Ideal for memory chip select decoding  
Mutually exclusive outputs  
Output drive capability 50 Ω transmission lines at 125 °C  
Complies with JEDEC standard:  
JESD8-7A (1.65 V to 1.95 V)  
JESD8-5A (2.3 V to 2.7 V)  
JESD8-C/JESD36 (2.7 V to 3.6 V)  
ESD protection:  
MIL-STD-883, method 3015 exceeds 2000 V  
HBM JESD22-A114F exceeds 2000 V  
MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 Ω)  
Multiple package options  
 
 

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