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74LVC125AM PDF预览

74LVC125AM

更新时间: 2024-11-04 00:01:23
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS 总线驱动器总线收发器逻辑集成电路光电二极管
页数 文件大小 规格书
10页 68K
描述
LOW VOLTAGE CMOS QUAD BUS BUFFERS (3-STATE) HIGH PERFORMANCE

74LVC125AM 技术参数

是否Rohs认证: 符合生命周期:Obsolete
零件包装代码:SOIC包装说明:SOP-14
针数:14Reach Compliance Code:unknown
HTS代码:8542.39.00.01风险等级:5.01
Is Samacsys:N系列:LVC/LCX/Z
JESD-30 代码:R-PDSO-G14JESD-609代码:e4
长度:8.65 mm逻辑集成电路类型:BUS DRIVER
湿度敏感等级:1位数:1
功能数量:4端口数量:2
端子数量:14最高工作温度:125 °C
最低工作温度:-55 °C输出特性:3-STATE
输出极性:TRUE封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装形状:RECTANGULAR
封装形式:SMALL OUTLINE传播延迟(tpd):12 ns
认证状态:Not Qualified座面最大高度:1.75 mm
最大供电电压 (Vsup):3.6 V最小供电电压 (Vsup):1.65 V
标称供电电压 (Vsup):2.7 V表面贴装:YES
技术:CMOS温度等级:MILITARY
端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
宽度:3.9 mmBase Number Matches:1

74LVC125AM 数据手册

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74LVC125A  
LOW VOLTAGE CMOS QUAD BUS BUFFERS (3-STATE)  
HIGH PERFORMANCE  
5V TOLERANT INPUTS  
HIGH SPEED: t = 4.8ns (MAX.) at V = 3V  
PD  
CC  
POWER DOWN PROTECTION ON INPUTS  
AND OUTPUTS  
SYMMETRICAL OUTPUT IMPEDANCE:  
|I | = I = 24mA (MIN) at V = 3V  
PCI BUS LEVELS GUARANTEED AT 24 mA  
OH  
OL  
CC  
SOP  
TSSOP  
BALANCED PROPAGATION DELAYS:  
t
t
PHL  
PLH  
ORDER CODES  
PACKAGE  
OPERATING VOLTAGE RANGE:  
(OPR) = 1.65V to 3.6V (1.2V Data  
Retention)  
PIN AND FUNCTION COMPATIBLE WITH  
74 SERIES 125  
LATCH-UP PERFORMANCE EXCEEDS  
500mA (JESD 17)  
V
CC  
TUBE  
T & R  
SOP  
74LVC125AM  
74LVC125AMTR  
74LVC125ATTR  
TSSOP  
It can be interfaced to 5V signal environment for  
inputs in mixed 3.3/5V system.  
ESD PERFORMANCE:  
HBM > 2000V (MIL STD 883 method 3015);  
MM > 200V  
These devices require the same 3-STATE control  
input G to be taken high to make the output go in  
to the high impedance state.  
It has more speed performance at 3.3V than 5V  
AC/ACT family, combined with a lower power  
consumption.  
All inputs and outputs are equipped with  
protection circuits against static discharge, giving  
them 2KV ESD immunity and transient excess  
voltage.  
DESCRIPTION  
The 74LVC125A is a low voltage CMOS QUAD  
BUS BUFFER fabricated with sub-micron silicon  
gate and double-layer metal wiring C MOS  
technology. It is ideal for 1.65 to 3.6 V  
2
CC  
operations and low power and low noise  
applications.  
PIN CONNECTION AND IEC LOGIC SYMBOLS  
February 2002  
1/9  

74LVC125AM 替代型号

型号 品牌 替代类型 描述 数据表
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