Datasheet > 74LVC10APW-Q100

74LVC10APW-Q100

更新时间： 2024-11-19 17:01:31

品牌	Logo	应用领域
安世 - NEXPERIA		/
页数	文件大小	规格书
10页	234K
描述
Triple 3-input NAND gateProduction

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74LVC10APW-Q100 数据手册

74LVC10A-Q100

Triple 3-input NAND gate

Rev. 1 — 24 January 2024

Product data sheet

1. General description

The 74LVC10A-Q100 provides three 3-input NAND functions.

Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices

as translators in mixed 3.3 V and 5 V applications.

This product has been qualified to the Automotive Electronics Council (AEC) standard Q100

(Grade 1) and is suitable for use in automotive applications.

2. Features and benefits

•

Automotive product qualification in accordance with AEC-Q100 (Grade 1)

Specified from -40 °C to +85 °C and from -40 °C to +125 °C

•

Wide supply voltage range from 1.2 V to 3.6 V

Inputs accept voltages up to 5.5 V

CMOS low power consumption

Direct interface with TTL levels

Latch-up performance exceeds 250 mA

Complies with JEDEC standard:

•

JESD8-7A (1.65 V to 1.95 V)

JESD8-5A (2.3 V to 2.7 V)

JESD8-C/JESD36 (2.7 V to 3.6 V)

•

ESD protection:

•

HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V

CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V

3. Ordering information

Table 1. Ordering information

Type number

Package

Temperature range Name

Description

Version

74LVC10APW-Q100 -40 °C to +125 °C

TSSOP14

plastic thin shrink small outline package;

14 leads; body width 4.4 mm

SOT402-1

12 3 4 5 6 7...10

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