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74LVC08ATTR PDF预览

74LVC08ATTR

更新时间: 2024-11-27 04:47:47
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS 栅极触发器逻辑集成电路光电二极管输入元件
页数 文件大小 规格书
11页 259K
描述
LOW VOLTAGE CMOS QUAD 2-INPUT AND GATE HIGH PERFORMANCE

74LVC08ATTR 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Obsolete零件包装代码:TSSOP
包装说明:TSSOP, TSSOP14,.25针数:14
Reach Compliance Code:compliantECCN代码:EAR99
风险等级:5.26Is Samacsys:N
系列:LVC/LCX/ZJESD-30 代码:R-PDSO-G14
JESD-609代码:e4长度:5 mm
负载电容(CL):50 pF逻辑集成电路类型:AND GATE
最大I(ol):0.024 A功能数量:4
输入次数:2端子数量:14
最高工作温度:125 °C最低工作温度:-55 °C
封装主体材料:PLASTIC/EPOXY封装代码:TSSOP
封装等效代码:TSSOP14,.25封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH包装方法:TAPE AND REEL
峰值回流温度(摄氏度):NOT SPECIFIED电源:3.3 V
Prop。Delay @ Nom-Sup:4.1 ns传播延迟(tpd):12 ns
认证状态:Not Qualified施密特触发器:NO
座面最大高度:1.2 mm子类别:Gates
最大供电电压 (Vsup):3.6 V最小供电电压 (Vsup):1.65 V
标称供电电压 (Vsup):2.7 V表面贴装:YES
技术:CMOS温度等级:MILITARY
端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)端子形式:GULL WING
端子节距:0.65 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:4.4 mm
Base Number Matches:1

74LVC08ATTR 数据手册

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74LVC08A  
LOW VOLTAGE CMOS QUAD 2-INPUT AND GATE  
HIGH PERFORMANCE  
5V TOLERANT INPUTS  
HIGH SPEED: t = 4.1ns (MAX.) at V = 3V  
PD  
CC  
POWER DOWN PROTECTION ON INPUTS  
AND OUTPUTS  
SYMMETRICAL OUTPUT IMPEDANCE:  
|I | = I = 24mA (MIN) at V = 3V  
OH  
OL  
CC  
SOP  
TSSOP  
PCI BUS LEVELS GUARANTEED AT 24 mA  
BALANCED PROPAGATION DELAYS:  
Table 1: Order Codes  
PACKAGE  
t
t
PLH  
PHL  
OPERATING VOLTAGE RANGE:  
(OPR) = 1.65V to 3.6V (1.2V Data  
T & R  
V
CC  
SOP  
74LVC08AMTR  
74LVC08ATTR  
Retention)  
TSSOP  
PIN AND FUNCTION COMPATIBLE WITH  
74 SERIES 08  
LATCH-UP PERFORMANCE EXCEEDS  
500mA (JESD 17)  
operations and low power and low noise  
applications.  
It can be interfaced to 5V signal environment for  
inputs in mixed 3.3/5V system.  
It has more speed performance at 3.3V than 5V  
AC/ACT family, combined with a lower power  
consumption.  
All inputs and outputs are equipped with  
protection circuits against static discharge, giving  
them 2KV ESD immunity and transient excess  
voltage.  
ESD PERFORMANCE:  
HBM > 2000V (MIL STD 883 method 3015);  
MM > 200V  
DESCRIPTION  
The 74LVC08A is a low voltage CMOS QUAD  
2-INPUT AND GATE fabricated with sub-micron  
silicon gate and double-layer metal wiring C MOS  
2
technology. It is ideal for 1.65 to 3.6 V  
CC  
Figure 1: Pin Connection And IEC Logic Symbols  
Rev. 4  
1/11  
July 2004  

74LVC08ATTR 替代型号

型号 品牌 替代类型 描述 数据表
SN74LVC08APWR TI

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