Datasheet > 74LVC08AD-Q100

74LVC08AD-Q100

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74LVC08AD-Q100 数据手册

74LVC08A-Q100

Quad 2-input AND gate

Rev. 2 — 19 April 2016

Product data sheet

1. General description

The 74LVC08A-Q100 provides four 2-input AND gates.

Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these

devices as translators in mixed 3.3 V and 5 V applications.

This product has been qualified to the Automotive Electronics Council (AEC) standard

Q100 (Grade 1) and is suitable for use in automotive applications.

2. Features and benefits

 Automotive product qualification in accordance with AEC-Q100 (Grade 1)

 Specified from 40 C to +85 C and from 40 C to +125 C

 5 V tolerant inputs for interfacing with 5 V logic

 Wide supply voltage range from 1.2 V to 3.6 V

 CMOS low power consumption

 Direct interface with TTL levels

 Complies with JEDEC standard:

 JESD8-7A (1.65 V to 1.95 V)

 JESD8-5A (2.3 V to 2.7 V)

 JESD8-C/JESD36 (2.7 V to 3.6 V)

 ESD protection:

 MIL-STD-883, method 3015 exceeds 2000 V

 HBM JESD22-A114F exceeds 2000 V

 MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 )

 Multiple package options

12 3 4 5 6 7...14

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型号	品牌	获取价格	描述	数据表
74LVC08ADR2G	ONSEMI	获取价格	Low-Voltage CMOS Quad 2-Input NAND Gate
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74LVC08APW	NXP	获取价格	Quad 2-input AND gate
74LVC08APW	NEXPERIA	获取价格	Quad 2-input AND gateProduction
74LVC08APWDH	NXP	获取价格	Quad 2-input AND gate
74LVC08APWDH-T	NXP	获取价格	IC LVC/LCX/Z SERIES, QUAD 2-INPUT AND GATE, PDSO14, Gate