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74LVC07A_15 PDF预览

74LVC07A_15

更新时间: 2024-11-07 01:12:11
品牌 Logo 应用领域
安森美 - ONSEMI /
页数 文件大小 规格书
7页 105K
描述
Low-Voltage CMOS Hex Buffer

74LVC07A_15 数据手册

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74LVC07A  
Low-Voltage CMOS Hex  
Buffer with Open Drain  
Outputs  
With 5 V − Tolerant Inputs  
www.onsemi.com  
The 74LVC07A is a high performance hex buffer operating from a  
1.2 V to 5.5 V supply. High impedance TTL compatible inputs  
significantly reduce current loading to input drivers. These LVC  
devices have open drain outputs which provide the ability to set output  
MARKING  
DIAGRAMS  
levels, or do active−HIGH AND or active−LOW OR functions. A V  
specification of 5.5 V allows 74LVC07A inputs to be safely driven  
from 5.0 V devices.  
I
14  
SOIC−14  
D SUFFIX  
CASE 751A  
LVC07AG  
AWLYWW  
14  
1
Features  
1
Designed for 1.2 V to 5.5 V V Operation  
CC  
14  
5.0 V Tolerant Inputs/Outputs  
LVTTL Compatible  
LVCMOS Compatible  
24 mA Output Sink Capability  
LVC  
07A  
TSSOP−14  
DT SUFFIX  
CASE 948G  
14  
ALYWG  
Near Zero Static Supply Current (10 mA) Substantially Reduces  
1
G
System Power Requirements  
Latchup Performance Exceeds 250 mA  
Wired−OR, Wired−AND  
1
A
= Assembly Location  
WL, L = Wafer Lot  
= Year  
Output Level Can Be Set Externally Without Affecting Speed of  
Y
Device  
WW, W = Work Week  
ESD Performance:  
Human Body Model >2000 V;  
Machine Model >200 V  
G or G = Pb−Free Package  
(Note: Microdot may be in either location)  
These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS  
Compliant  
ORDERING INFORMATION  
See detailed ordering and shipping information in the package  
dimensions section on page 2 of this data sheet.  
V
A3  
O3  
12  
A4  
O4  
A5  
O5  
CC  
14  
13  
11  
10  
9
8
1
2
3
4
5
6
7
A0  
O0  
A1  
O1  
A2  
O2 GND  
Figure 1. Pinout: 14−Lead (Top View)  
© Semiconductor Components Industries, LLC, 2015  
1
Publication Order Number:  
December, 2015 − Rev. 0  
74LVC07A/D  

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