Datasheet > 74LV165PW-Q100

74LV165PW-Q100

更新时间： 2024-09-24 02:56:59

品牌	Logo	应用领域
安世 - NEXPERIA		/
页数	文件大小	规格书
19页	777K
描述
8-bit parallel-in/serial-out shift register

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74LV165PW-Q100 数据手册

74LV165-Q100

8-bit parallel-in/serial-out shift register

Rev. 2 — 24 February 2014

Product data sheet

1. General description

The 74LV165-Q100 is an 8-bit parallel-load or serial-in shift register with complementary

serial outputs (Q7 and Q7) available from the last stage. When the parallel-load input (PL)

is LOW, parallel data from the inputs D0 to D7 are loaded into the register asynchronously.

When input PL is HIGH, data enters the register serially at the input DS. It shifts one place

to the right (Q0 Q1 Q2, etc.) with each positive-going clock transition. This feature

allows parallel-to-serial converter expansion by tying the output Q7 to the input DS of the

succeeding stage.

The clock input is a gate-OR structure which allows one input to be used as an active

LOW clock enable input (CE) input. The pin assignment for the inputs CP and CE is

arbitrary and can be reversed for layout convenience. The LOW-to-HIGH transition of the

input CE should only take place while CP HIGH for predictable operation. Either the CP or

the CE should be HIGH before the LOW-to-HIGH transition of PL to prevent shifting the

data when PL is activated.

This product has been qualified to the Automotive Electronics Council (AEC) standard

Q100 (Grade 1) and is suitable for use in automotive applications.

2. Features and benefits

 Automotive product qualification in accordance with AEC-Q100 (Grade 1)

 Specified from 40 C to +85 C and from 40 C to +125 C

 Wide supply voltage range from 1.0 V to 5.5 V

 Synchronous parallel-to-serial applications

 Optimized for low voltage applications: 1.0 V to 3.6 V

 Synchronous serial input for easy expansion

 Latch-up performance exceeds 250 mA

 5.5 V tolerant inputs/outputs

 Direct interface with TTL levels (2.7 V to 3.6 V)

 Power-down mode

 Complies with JEDEC standards:

 JESD8-5 (2.3 V to 2.7 V)

 JESD8B/JESD36 (2.7 V to 3.6 V)

 JESD8-1A (4.5 V to 5.5 V)

 ESD protection:

 MIL-STD-833, method 3015 exceeds 2000 V

 HBM JESD22-A114F exceeds 2000 V

 MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 )

12 3 4 5 6 7...19

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