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74LV132BQ PDF预览

74LV132BQ

更新时间: 2024-02-24 15:32:14
品牌 Logo 应用领域
恩智浦 - NXP 栅极触发器
页数 文件大小 规格书
17页 106K
描述
Quad 2-input NAND Schmitt trigger

74LV132BQ 技术参数

是否Rohs认证:符合生命周期:Transferred
包装说明:TSSOP, TSSOP14,.25Reach Compliance Code:unknown
风险等级:5.76Is Samacsys:N
JESD-30 代码:R-PDSO-G14负载电容(CL):50 pF
逻辑集成电路类型:NAND GATE最大I(ol):0.006 A
端子数量:14最高工作温度:125 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装等效代码:TSSOP14,.25
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
包装方法:TAPE AND REEL电源:3.3 V
Prop。Delay @ Nom-Sup:25 ns认证状态:Not Qualified
施密特触发器:YES子类别:Gates
标称供电电压 (Vsup):3.3 V表面贴装:YES
技术:CMOS温度等级:AUTOMOTIVE
端子形式:GULL WING端子节距:0.635 mm
端子位置:DUALBase Number Matches:1

74LV132BQ 数据手册

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74LV132  
Quad 2-input NAND Schmitt trigger  
Rev. 04 — 12 November 2007  
Product data sheet  
1. General description  
The 74LV132 is a low-voltage Si-gate CMOS device that is pin and function compatible  
with 74HC132 and 74HCT132.  
The 74LV132 contains four 2-input NAND gates which accept standard input signals.  
They are capable of transforming slowly changing input signals into sharply defined,  
jitter-free output signals.  
The gate switches at different points for positive and negative-going signals. The  
difference between the positive voltage VT+ and the negative voltage VTis defined as the  
input hysteresis voltage VH.  
2. Features  
Wide operating voltage: 1.0 V to 5.5 V  
Optimized for low voltage applications: 1.0 V to 3.6 V  
Accepts TTL input levels between VCC = 2.7 V and VCC = 3.6 V  
Typical output ground bounce < 0.8 V at VCC = 3.3 V and Tamb = 25 °C  
Typical HIGH-level output voltage (VOH) undershoot: > 2 V at VCC = 3.3 V and  
Tamb = 25 °C  
ESD protection:  
HBM JESD22-A114E exceeds 2000 V  
MM JESD22-A115-A exceeds 200 V  
Multiple package options  
Specified from 40 °C to +85 °C and from 40 °C to +125 °C  
3. Applications  
Wave and pulse shapers for highly noisy environments  
Astable multivibrators  
Monostable multivibrators  

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