Datasheet > 74LV00D-Q100

74LV00D-Q100

更新时间： 2024-04-09 18:58:32

品牌	Logo	应用领域
安世 - NEXPERIA		/
页数	文件大小	规格书
11页	214K
描述
Quad 2-input NAND gateProduction

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74LV00D-Q100 数据手册

74LV00-Q100

Quad 2-input NAND gate

Rev. 1 — 22 January 2024

Product data sheet

1. General description

The 74LV00 is a quad 2-input NAND gate. Inputs include clamp diodes. This enables the use of

current limiting resistors to interface inputs to voltages in excess V_CC

This product has been qualified to the Automotive Electronics Council (AEC) standard Q100

(Grade 1) and is suitable for use in automotive applications.

2. Features and benefits

•

Automotive product qualification in accordance with AEC-Q100 (Grade 1)

Specified from -40 °C to +85 °C and from -40 °C to +125 °C

•

Wide supply voltage range from 1.0 to 5.5 V

CMOS low power dissipation

Latch-up performance exceeds 100 mA per JESD 78 Class II Level B

Optimized for low voltage applications: 1.0 V to 3.6 V

Accepts TTL input levels between V_CC= 2.7 V and V_CC= 3.6 V

Typical output ground bounce < 0.8 V at V_CC= 3.3 V and T_amb= 25 °C

Typical HIGH-level output voltage (V_OH) undershoot: > 2 V at V_CC= 3.3 V and T_amb= 25 °C

Complies with JEDEC standards:

•

JESD8-7 (1.65 V to 1.95 V)

JESD8-5 (2.3 V to 2.7 V)

JESD8C (2.7 V to 3.6 V)

JESD36 (4.5 V to 5.5 V)

•

ESD protection:

•

HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V

CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V

3. Ordering information

Table 1. Ordering information

Type number

Package

Temperature range Name

Description

Version

74LV00D-Q100 -40 °C to +125 °C

SO14

plastic small outline package; 14 leads;

body width 3.9 mm

SOT108-1

74LV00PW-Q100 -40 °C to +125 °C

TSSOP14

plastic thin shrink small outline package; 14 leads;

body width 4.4 mm

SOT402-1

12 3 4 5 6 7...11

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