生命周期: | Obsolete | 包装说明: | , |
Reach Compliance Code: | unknown | HTS代码: | 8542.39.00.01 |
风险等级: | 5.23 | Is Samacsys: | N |
其他特性: | MASTER SLAVE OPERATION | 系列: | LS |
JESD-30 代码: | R-PDIP-T14 | 负载电容(CL): | 15 pF |
逻辑集成电路类型: | J-K FLIP-FLOP | 位数: | 2 |
功能数量: | 2 | 端子数量: | 14 |
最高工作温度: | 70 °C | 最低工作温度: | |
输出极性: | COMPLEMENTARY | 封装主体材料: | PLASTIC/EPOXY |
封装形状: | RECTANGULAR | 封装形式: | IN-LINE |
最大电源电流(ICC): | 8 mA | 传播延迟(tpd): | 30 ns |
认证状态: | Not Qualified | 标称供电电压 (Vsup): | 5 V |
表面贴装: | NO | 技术: | TTL |
温度等级: | COMMERCIAL | 端子形式: | THROUGH-HOLE |
端子位置: | DUAL | 触发器类型: | NEGATIVE EDGE |
最小 fmax: | 30 MHz | Base Number Matches: | 1 |
型号 | 品牌 | 获取价格 | 描述 | 数据表 |
74LS73F | NXP |
获取价格 |
IC LS SERIES, DUAL NEGATIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, CDIP14, FF | |
74LS73FC | FAIRCHILD |
获取价格 |
J-K Flip-Flop, 2-Func, Negative Edge Triggered, TTL, CDFP14, | |
74LS73FCQM | FAIRCHILD |
获取价格 |
J-K Flip-Flop, 2-Func, Negative Edge Triggered, TTL, CDFP14, | |
74LS73FCQR | FAIRCHILD |
获取价格 |
J-K Flip-Flop, 2-Func, Negative Edge Triggered, TTL, CDFP14, | |
74LS73N | NXP |
获取价格 |
IC LS SERIES, DUAL NEGATIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, PDIP14, PL | |
74LS73NA+1 | RAYTHEON |
获取价格 |
J-K Flip-Flop, 2-Func, Negative Edge Triggered, TTL, PDIP14, | |
74LS73PC | FAIRCHILD |
获取价格 |
J-K Flip-Flop, LS Series, 2-Func, Negative Edge Triggered, 2-Bit, Complementary Output, TT | |
74LS74 | NSC |
获取价格 |
Dual Positive-Edge-Triggered D Flip-Flops with Preset, Clear and Complementary Outputs | |
74LS74 | MOTOROLA |
获取价格 |
DUAL D-TYPE POSITIVE EDGE-TRIGGERED FLIP-FLOP | |
74LS74 | ONSEMI |
获取价格 |
LOW POWER SCHOTTKY |