生命周期: | Obsolete | 包装说明: | , |
Reach Compliance Code: | unknown | HTS代码: | 8542.39.00.01 |
风险等级: | 5.4 | Is Samacsys: | N |
系列: | LS | JESD-30 代码: | R-GDIP-T14 |
负载电容(CL): | 15 pF | 逻辑集成电路类型: | AND-OR-INVERT GATE |
功能数量: | 1 | 输入次数: | 10 |
端子数量: | 14 | 最高工作温度: | 70 °C |
最低工作温度: | 封装主体材料: | CERAMIC, GLASS-SEALED | |
封装形状: | RECTANGULAR | 封装形式: | IN-LINE |
最大电源电流(ICC): | 2 mA | 传播延迟(tpd): | 20 ns |
认证状态: | Not Qualified | 标称供电电压 (Vsup): | 5 V |
表面贴装: | NO | 技术: | TTL |
温度等级: | COMMERCIAL | 端子形式: | THROUGH-HOLE |
端子位置: | DUAL | Base Number Matches: | 1 |
型号 | 品牌 | 获取价格 | 描述 | 数据表 |
74LS54NA+1 | RAYTHEON |
获取价格 |
AND-OR-Invert Gate, TTL, PDIP14, | |
74LS54PC | ETC |
获取价格 |
2/2/3/3-input AND-NOR Gate | |
74LS54PCQM | FAIRCHILD |
获取价格 |
AND-OR-Invert Gate, TTL, PDIP14, | |
74LS54PCQR | FAIRCHILD |
获取价格 |
AND-OR-Invert Gate, TTL, PDIP14, | |
74LS55 | TI |
获取价格 |
2 WIDE 4 INPUT AND ORINVERT GATES | |
74LS55DC | FAIRCHILD |
获取价格 |
AND-OR-Invert Gate, TTL, CDIP14, | |
74LS55N | RAYTHEON |
获取价格 |
AND-OR-Invert Gate, TTL, PDIP14, | |
74LS55NA+1 | RAYTHEON |
获取价格 |
AND-OR-Invert Gate, TTL, PDIP14, | |
74LS55SC | ETC |
获取价格 |
4/4-input AND-NOR Gate | |
74LS563DC | FAIRCHILD |
获取价格 |
D Latch, 1-Func, 8-Bit, TTL, CDIP20, |